Lines Matching refs:CSR0
253 * CSR0 - Status and Control flags
262 #define CSR0 0x00
516 int csr0, rmdstat, packet_there;
517 PRINTF2(("## %s: At beginning of SK_poll(). CSR0: %#hX\n",
518 SK_NAME, SK_read_reg(CSR0)));
521 csr0 = SK_read_reg(CSR0); /* store register for checking */
528 SK_write_reg(CSR0, csr0 & CSR0_CLRALL);
530 if (csr0 & CSR0_ERR) /* LANCE Error */
532 printf("%s: error: %#hX", SK_NAME, csr0);
534 if (csr0 & CSR0_MISS) /* No place to store packet ? */
611 SK_write_reg(CSR0, CSR0_INEA); /* Enable Interrupts */
629 int csr0, i, tmdstat;
631 PRINTF2(("## %s: At beginning of SK_transmit(). CSR0: %#hX\n",
632 SK_NAME, SK_read_reg(CSR0)));
664 SK_write_reg(CSR0, CSR0_TDMD | CSR0_INEA);
666 csr0 = SK_read_reg(CSR0); /* store register for checking */
673 SK_write_reg(CSR0, csr0 & CSR0_CLRALL);
675 if (csr0 & CSR0_ERR) /* LANCE Error */
677 printf("%s: error: %#hX", SK_NAME, csr0);
679 if (csr0 & CSR0_MISS) /* No place to store packet ? */
720 SK_write_reg(CSR0, CSR0_INEA); /* Enable Interrupts */
733 PRINTF(("## %s: At beginning of SK_disable(). CSR0: %#hX\n",
734 SK_NAME, SK_read_reg(CSR0)));
735 PRINTF(("%s: Shutting %s down CSR0 %#hX\n", SK_NAME, SK_NAME,
736 (int) SK_read_reg(CSR0)));
738 SK_write_reg(CSR0, CSR0_STOP); /* STOP the LANCE */
861 printf("## %s: After lance init. CSR0: %#hX\n",
862 SK_NAME, SK_read_reg(CSR0));
863 SK_write_reg(CSR0, CSR0_STOP);
864 printf("## %s: LANCE stopped. CSR0: %#hX\n",
865 SK_NAME, SK_read_reg(CSR0));
867 printf("## %s: Reinit with DTX + DRX off. CSR0: %#hX\n",
868 SK_NAME, SK_read_reg(CSR0));
869 SK_write_reg(CSR0, CSR0_STOP);
870 printf("## %s: LANCE stopped. CSR0: %#hX\n",
871 SK_NAME, SK_read_reg(CSR0));
873 printf("## %s: LANCE back to normal mode. CSR0: %#hX\n",
874 SK_NAME, SK_read_reg(CSR0));
883 PRINTF(("## %s: LANCE init failed: CSR0: %#hX\n",
884 SK_NAME, SK_read_reg(CSR0)));
904 PRINTF(("## %s: At beginning of LANCE init. CSR0: %#hX\n",
905 SK_NAME, SK_read_reg(CSR0)));
991 PRINTF(("## %s: After setting CSR1-3. CSR0: %#hX\n",
992 SK_NAME, SK_read_reg(CSR0)));
1001 SK_write_reg(CSR0, CSR0_INIT);
1005 SK_set_RAP(CSR0); /* Register Address Pointer to CSR0 */
1014 SK_NAME, (int) SK_read_reg(CSR0),
1028 SK_write_reg(CSR0, CSR0_IDON | CSR0_INEA | CSR0_STRT);
1030 PRINTF(("## %s: LANCE started. CSR0: %#hX\n", SK_NAME,
1031 SK_read_reg(CSR0)));
1039 * ! CSR1-3 can only be accessed when in CSR0 the STOP bit is set !
