Lines Matching refs:getOpcode
650 switch (MI->getOpcode()) {
2314 switch (Op.getOpcode()) {
2365 if (Shift.getOpcode() != ISD::SRL)
2405 SDValue Chain = AtomicNode->getOpcode() == ISD::ATOMIC_LOAD ?
2418 if (AtomicNode->getOpcode() == ISD::ATOMIC_LOAD)
2432 if (FenceOp.getOpcode() != ISD::ATOMIC_FENCE)
2475 if (MaskedVal.getOpcode() == ISD::SHL &&
2479 } else if (MaskedVal.getOpcode() == ISD::SRL &&
2504 if (N.getOpcode() == ISD::ZERO_EXTEND) {
2509 if (N.getOpcode() == ISD::AND && isa<ConstantSDNode>(N.getOperand(1))) {
2517 if (N.getOpcode() == AArch64ISD::BFI) {
2536 assert(N->getOpcode() == ISD::OR && "Unexpected root");
2541 if (LHS.getOpcode() != ISD::AND)
2553 if (RHS.getOpcode() != ISD::AND)
2631 if (PossExtraMask.getOpcode() != ISD::AND ||
2673 if (N.getOpcode() == ISD::SHL)
2675 else if (N.getOpcode() == ISD::SRL)
2699 assert(N->getOpcode() == ISD::OR && "Unexpected root");
2782 if (Shift.getOpcode() != ISD::SHL)
2804 switch (N->getOpcode()) {
