Lines Matching refs:AArch64
1 //=- AArch64/AArch64MCCodeEmitter.cpp - Convert AArch64 code to machine code =//
65 template<AArch64::Fixups fixupDesired>
155 unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_lo12,
156 AArch64::fixup_a64_ldst16_lo12,
157 AArch64::fixup_a64_ldst32_lo12,
158 AArch64::fixup_a64_ldst64_lo12,
159 AArch64::fixup_a64_ldst128_lo12 };
166 FixupKind = AArch64::fixup_a64_ld64_got_lo12_nc;
169 unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_dtprel_lo12,
170 AArch64::fixup_a64_ldst16_dtprel_lo12,
171 AArch64::fixup_a64_ldst32_dtprel_lo12,
172 AArch64::fixup_a64_ldst64_dtprel_lo12 };
178 unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_dtprel_lo12_nc,
179 AArch64::fixup_a64_ldst16_dtprel_lo12_nc,
180 AArch64::fixup_a64_ldst32_dtprel_lo12_nc,
181 AArch64::fixup_a64_ldst64_dtprel_lo12_nc };
188 FixupKind = AArch64::fixup_a64_ld64_gottprel_lo12_nc;
191 unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_tprel_lo12,
192 AArch64::fixup_a64_ldst16_tprel_lo12,
193 AArch64::fixup_a64_ldst32_tprel_lo12,
194 AArch64::fixup_a64_ldst64_tprel_lo12 };
200 unsigned FixupsBySize[] = { AArch64::fixup_a64_ldst8_tprel_lo12_nc,
201 AArch64::fixup_a64_ldst16_tprel_lo12_nc,
202 AArch64::fixup_a64_ldst32_tprel_lo12_nc,
203 AArch64::fixup_a64_ldst64_tprel_lo12_nc };
210 FixupKind = AArch64::fixup_a64_tlsdesc_ld64_lo12_nc;
230 FixupKind = AArch64::fixup_a64_add_lo12; break;
232 FixupKind = AArch64::fixup_a64_add_dtprel_hi12; break;
234 FixupKind = AArch64::fixup_a64_add_dtprel_lo12; break;
236 FixupKind = AArch64::fixup_a64_add_dtprel_lo12_nc; break;
238 FixupKind = AArch64::fixup_a64_add_tprel_hi12; break;
240 FixupKind = AArch64::fixup_a64_add_tprel_lo12; break;
242 FixupKind = AArch64::fixup_a64_add_tprel_lo12_nc; break;
244 FixupKind = AArch64::fixup_a64_tlsdesc_add_lo12_nc; break;
267 FixupKind = AArch64::fixup_a64_adr_prel_page;
270 FixupKind = AArch64::fixup_a64_adr_prel_got_page;
273 FixupKind = AArch64::fixup_a64_adr_gottprel_page;
276 FixupKind = AArch64::fixup_a64_tlsdesc_adr_page;
306 template<AArch64::Fixups fixupDesired> unsigned
335 FixupKind = AArch64::fixup_a64_ld_gottprel_prel19;
337 FixupKind = AArch64::fixup_a64_ld_prel;
372 AArch64::Fixups requestedFixup;
376 requestedFixup = AArch64::fixup_a64_movw_uabs_g0; break;
378 requestedFixup = AArch64::fixup_a64_movw_uabs_g0_nc; break;
380 requestedFixup = AArch64::fixup_a64_movw_uabs_g1; break;
382 requestedFixup = AArch64::fixup_a64_movw_uabs_g1_nc; break;
384 requestedFixup = AArch64::fixup_a64_movw_uabs_g2; break;
386 requestedFixup = AArch64::fixup_a64_movw_uabs_g2_nc; break;
388 requestedFixup = AArch64::fixup_a64_movw_uabs_g3; break;
390 requestedFixup = AArch64::fixup_a64_movw_sabs_g0; break;
392 requestedFixup = AArch64::fixup_a64_movw_sabs_g1; break;
394 requestedFixup = AArch64::fixup_a64_movw_sabs_g2; break;
396 requestedFixup = AArch64::fixup_a64_movw_dtprel_g2; break;
398 requestedFixup = AArch64::fixup_a64_movw_dtprel_g1; break;
400 requestedFixup = AArch64::fixup_a64_movw_dtprel_g1_nc; break;
402 requestedFixup = AArch64::fixup_a64_movw_dtprel_g0; break;
404 requestedFixup = AArch64::fixup_a64_movw_dtprel_g0_nc; break;
406 requestedFixup = AArch64::fixup_a64_movw_gottprel_g1; break;
408 requestedFixup = AArch64::fixup_a64_movw_gottprel_g0_nc; break;
410 requestedFixup = AArch64::fixup_a64_movw_tprel_g2; break;
412 requestedFixup = AArch64::fixup_a64_movw_tprel_g1; break;
414 requestedFixup = AArch64::fixup_a64_movw_tprel_g1_nc; break;
416 requestedFixup = AArch64::fixup_a64_movw_tprel_g0; break;
418 requestedFixup = AArch64::fixup_a64_movw_tprel_g0_nc; break;
485 if (MI.getOpcode() == AArch64::TLSDESCCALL) {
489 MCFixupKind Fixup = MCFixupKind(AArch64::fixup_a64_tlsdesc_call);
