Lines Matching refs:Hexagon
1 //===-- HexagonISelLowering.cpp - Hexagon DAG Lowering Implementation -----===//
10 // This file implements the interfaces that Hexagon uses to lower LLVM code
45 EmitJumpTables("hexagon-emit-jump-tables", cl::init(true), cl::Hidden,
46 cl::desc("Control jump table emission on Hexagon target"));
50 // Implement calling convention for Hexagon.
174 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
175 Hexagon::R5
191 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
197 Hexagon::D1, Hexagon::D2
200 Hexagon::R1, Hexagon::R3
207 unsigned Offset = State.AllocateStack(8, 8, Hexagon::D2);
248 if (unsigned Reg = State.AllocateReg(Hexagon::R0)) {
263 if (unsigned Reg = State.AllocateReg(Hexagon::D0)) {
663 // ShiftAmount = number of left-shifted bits in the Hexagon instruction.
781 // For Hexagon, the outgoing memory arguments area should be on top of the
835 // stack where the return value will be stored. For Hexagon, the location on
858 RegInfo.createVirtualRegister(&Hexagon::IntRegsRegClass);
863 RegInfo.createVirtualRegister(&Hexagon::DoubleRegsRegClass);
1057 addRegisterClass(MVT::i32, &Hexagon::IntRegsRegClass);
1058 addRegisterClass(MVT::i64, &Hexagon::DoubleRegsRegClass);
1061 addRegisterClass(MVT::f32, &Hexagon::IntRegsRegClass);
1062 addRegisterClass(MVT::f64, &Hexagon::DoubleRegsRegClass);
1065 addRegisterClass(MVT::i1, &Hexagon::PredRegsRegClass);
1123 // Hexagon V5 Support.
1310 // Hexagon has a i1 sign extending load.
1322 // Hexagon doesn't have sext_inreg, replace them with shl/sra.
1325 // Hexagon has no REM or DIVREM operations.
1354 // Hexagon has no select or setcc: expand to SELECT_CC.
1448 setExceptionPointerRegister(Hexagon::R20);
1449 setExceptionSelectorRegister(Hexagon::R21);
1451 setExceptionPointerRegister(Hexagon::R0);
1452 setExceptionSelectorRegister(Hexagon::R1);
1529 llvm_unreachable("TLS not implemented for Hexagon.");
1549 // Hexagon Scheduler Hooks
1556 case Hexagon::ADJDYNALLOC: {
1585 return std::make_pair(0U, &Hexagon::IntRegsRegClass);
1588 return std::make_pair(0U, &Hexagon::DoubleRegsRegClass);
