Lines Matching refs:MSP430
1 //===-- MSP430ISelLowering.cpp - MSP430 DAG Lowering Implementation ------===//
14 #define DEBUG_TYPE "msp430-lower"
17 #include "MSP430.h"
48 HWMultMode("msp430-hwmult-mode",
67 addRegisterClass(MVT::i8, &MSP430::GR8RegClass);
68 addRegisterClass(MVT::i16, &MSP430::GR16RegClass);
78 setStackPointerRegisterToSaveRestore(MSP430::SPW);
208 // MSP430 Inline Assembly Support
236 return std::make_pair(0U, &MSP430::GR8RegClass);
238 return std::make_pair(0U, &MSP430::GR16RegClass);
289 // MSP430 target does not yet support tail call optimization.
349 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
514 StackPtr = DAG.getCopyFromReg(Chain, dl, MSP430::SPW, getPointerTy());
853 SDValue SR = DAG.getCopyFromReg(DAG.getEntryNode(), dl, MSP430::SRW,
959 MSP430::FPW, VT);
1053 // MSP430 implicitly zero-extends 8-bit results in 16-bit registers.
1058 // MSP430 implicitly zero-extends 8-bit results in 16-bit registers.
1082 case MSP430::Shl8:
1083 Opc = MSP430::SHL8r1;
1084 RC = &MSP430::GR8RegClass;
1086 case MSP430::Shl16:
1087 Opc = MSP430::SHL16r1;
1088 RC = &MSP430::GR16RegClass;
1090 case MSP430::Sra8:
1091 Opc = MSP430::SAR8r1;
1092 RC = &MSP430::GR8RegClass;
1094 case MSP430::Sra16:
1095 Opc = MSP430::SAR16r1;
1096 RC = &MSP430::GR16RegClass;
1098 case MSP430::Srl8:
1099 Opc = MSP430::SAR8r1c;
1100 RC = &MSP430::GR8RegClass;
1102 case MSP430::Srl16:
1103 Opc = MSP430::SAR16r1c;
1104 RC = &MSP430::GR16RegClass;
1132 unsigned ShiftAmtReg = RI.createVirtualRegister(&MSP430::GR8RegClass);
1133 unsigned ShiftAmtReg2 = RI.createVirtualRegister(&MSP430::GR8RegClass);
1143 BuildMI(BB, dl, TII.get(MSP430::CMP8ri))
1145 BuildMI(BB, dl, TII.get(MSP430::JCC))
1154 BuildMI(LoopBB, dl, TII.get(MSP430::PHI), ShiftReg)
1157 BuildMI(LoopBB, dl, TII.get(MSP430::PHI), ShiftAmtReg)
1162 BuildMI(LoopBB, dl, TII.get(MSP430::SUB8ri), ShiftAmtReg2)
1164 BuildMI(LoopBB, dl, TII.get(MSP430::JCC))
1170 BuildMI(*RemBB, RemBB->begin(), dl, TII.get(MSP430::PHI), DstReg)
1183 if (Opc == MSP430::Shl8 || Opc == MSP430::Shl16 ||
1184 Opc == MSP430::Sra8 || Opc == MSP430::Sra16 ||
1185 Opc == MSP430::Srl8 || Opc == MSP430::Srl16)
1191 assert((Opc == MSP430::Select16 || Opc == MSP430::Select8) &&
1224 BuildMI(BB, dl, TII.get(MSP430::JCC))
1240 BuildMI(*BB, BB->begin(), dl, TII.get(MSP430::PHI),
