Lines Matching defs:Ops
240 std::vector<SDValue> Ops;
242 Ops.push_back(Use->getOperand(i));
262 // 0 for MachineInstrs, but we have no DST in the Ops vector.
278 Ops[ImmIdx] = CurDAG->getTargetConstant(ImmValue, MVT::i32);
282 Ops[Use.getOperandNo()] = CurDAG->getRegister(ImmReg, MVT::i32);
284 CurDAG->UpdateNodeOperands(*Use, Ops.data(), Use->getNumOperands());
305 std::vector<SDValue> Ops;
308 Ops.push_back(*I);
309 IsModified = FoldOperands(Result->getMachineOpcode(), TII, Ops);
311 Result = CurDAG->UpdateNodeOperands(Result, Ops.data(), Ops.size());
322 std::vector<SDValue> Ops;
325 Ops.push_back(Result->getOperand(i));
327 Ops[ClampIdx - 1] = CurDAG->getTargetConstant(1, MVT::i32);
330 Ops.data(), NumOp);
340 const R600InstrInfo *TII, std::vector<SDValue> &Ops) {
365 SDValue Operand = Ops[OperandIdx[i] - 1];
379 if (RegisterSDNode *Reg = dyn_cast<RegisterSDNode>(Ops[SrcIdx - 1])) {
381 ConstantSDNode *Cst = dyn_cast<ConstantSDNode>(Ops[SelIdx[j] - 1]);
392 Ops[OperandIdx[i] - 1] = CurDAG->getRegister(AMDGPU::ALU_CONST, MVT::f32);
393 Ops[SelIdx[i] - 1] = CstOffset;
399 Ops[OperandIdx[i] - 1] = Operand.getOperand(0);
400 Ops[NegIdx[i] - 1] = CurDAG->getTargetConstant(1, MVT::i32);
405 Ops[OperandIdx[i] - 1] = Operand.getOperand(0);
406 Ops[AbsIdx[i] - 1] = CurDAG->getTargetConstant(1, MVT::i32);
409 Ops[OperandIdx[i] - 1] = Operand.getOperand(0);
