Lines Matching full:getoperand
850 DAG.ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
851 DAG.ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
870 LHS.getOperand(3).getOpcode() == SPISD::CMPICC) ||
872 LHS.getOperand(3).getOpcode() == SPISD::CMPFCC)) &&
873 isa<ConstantSDNode>(LHS.getOperand(0)) &&
874 isa<ConstantSDNode>(LHS.getOperand(1)) &&
875 cast<ConstantSDNode>(LHS.getOperand(0))->isOne() &&
876 cast<ConstantSDNode>(LHS.getOperand(1))->isNullValue()) {
877 SDValue CMPCC = LHS.getOperand(3);
878 SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
879 LHS = CMPCC.getOperand(0);
880 RHS = CMPCC.getOperand(1);
930 Op = DAG.getNode(SPISD::FTOI, dl, MVT::f32, Op.getOperand(0));
936 assert(Op.getOperand(0).getValueType() == MVT::i32);
937 SDValue Tmp = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0));
943 SDValue Chain = Op.getOperand(0);
944 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
945 SDValue LHS = Op.getOperand(2);
946 SDValue RHS = Op.getOperand(3);
947 SDValue Dest = Op.getOperand(4);
973 SDValue LHS = Op.getOperand(0);
974 SDValue RHS = Op.getOperand(1);
975 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
976 SDValue TrueVal = Op.getOperand(2);
977 SDValue FalseVal = Op.getOperand(3);
1015 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
1016 return DAG.getStore(Op.getOperand(0), dl, Offset, Op.getOperand(1),
1023 SDValue InChain = Node->getOperand(0);
1024 SDValue VAListPtr = Node->getOperand(1);
1025 const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1055 SDValue Chain = Op.getOperand(0); // Legalize the chain.
1056 SDValue Size = Op.getOperand(1); // Legalize the size.
1185 CC = (SPCC::CondCodes)MI->getOperand(3).getImm();
1231 BuildMI(*BB, BB->begin(), dl, TII.get(SP::PHI), MI->getOperand(0).getReg())
1232 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
1233 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
