Lines Matching refs:RT
392 #define RT(r) ((r)<<21)
405 #define TAB(t,a,b) (RT(t) | RA(a) | RB(b))
453 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff));
455 tcg_out32 (s, ADDIS | RT (ret) | RA (0) | ((arg >> 16) & 0xffff));
521 tcg_out32 (s, LD | RT (0) | RA (reg));
523 tcg_out32 (s, LD | RT (11) | RA (reg) | 16);
524 tcg_out32 (s, LD | RT (2) | RA (reg) | 8);
533 tcg_out32 (s, op1 | RT (ret) | RA (addr) | (offset & 0xffff));
536 tcg_out32 (s, op2 | RT (ret) | RA (addr) | RB (0));
544 tcg_out32 (s, op1 | RT (ret) | RA (addr) | (offset & 0xffff));
547 tcg_out32 (s, op2 | RT (ret) | RA (addr) | RB (0));
583 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (TCG_AREG0));
584 tcg_out32 (s, (LWZU | RT (r1) | RA (r0) | offset));
602 tcg_out32 (s, LD_ADDR | RT (r1) | RA (r0) | offset);
680 | RT (r0)
686 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg));
741 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4);
750 tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0));
751 tcg_out32 (s, LWBRX | RT ( r1) | RA (r0));
754 else tcg_out32 (s, LD | RT (data_reg) | RA (r0));
808 | RT (r0)
814 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg));
850 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4);
890 tcg_out32 (s, MFSPR | RT (0) | LR);
916 | RT (tcg_target_callee_save_regs[i])
921 tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 16));
923 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
945 static void ppc_addi32 (TCGContext *s, int rt, int ra, tcg_target_long si)
947 if (!si && rt == ra)
951 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff));
954 tcg_out32 (s, ADDIS | RT (rt) | RA (ra) | h);
955 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff));
959 static void ppc_addi64 (TCGContext *s, int rt, int ra, tcg_target_long si)
964 ppc_addi32 (s, rt, ra, si);
967 tcg_out32 (s, ADD | RT (rt) | RA (ra));
1116 tcg_out32 (s, ADDIC | RT (0) | RA (arg) | 0xffff);
1120 tcg_out32 (s, ADDIC | RT (arg0) | RA (arg) | 0xffff);
1150 tcg_out32 (s, MFCR | RT (0));
1373 tcg_out32 (s, MULLI | RT (args[0]) | RA (args[1])
1449 tcg_out32 (s, NEG | RT (args[0]) | RA (args[1]));
