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      1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 
     10 #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H
     11 #define CLANG_CODEGEN_CGRECORDLAYOUT_H
     12 
     13 #include "clang/AST/CharUnits.h"
     14 #include "clang/AST/Decl.h"
     15 #include "clang/Basic/LLVM.h"
     16 #include "llvm/ADT/DenseMap.h"
     17 #include "llvm/IR/DerivedTypes.h"
     18 
     19 namespace llvm {
     20   class StructType;
     21 }
     22 
     23 namespace clang {
     24 namespace CodeGen {
     25 
     26 /// \brief Structure with information about how a bitfield should be accessed.
     27 ///
     28 /// Often we layout a sequence of bitfields as a contiguous sequence of bits.
     29 /// When the AST record layout does this, we represent it in the LLVM IR's type
     30 /// as either a sequence of i8 members or a byte array to reserve the number of
     31 /// bytes touched without forcing any particular alignment beyond the basic
     32 /// character alignment.
     33 ///
     34 /// Then accessing a particular bitfield involves converting this byte array
     35 /// into a single integer of that size (i24 or i40 -- may not be power-of-two
     36 /// size), loading it, and shifting and masking to extract the particular
     37 /// subsequence of bits which make up that particular bitfield. This structure
     38 /// encodes the information used to construct the extraction code sequences.
     39 /// The CGRecordLayout also has a field index which encodes which byte-sequence
     40 /// this bitfield falls within. Let's assume the following C struct:
     41 ///
     42 ///   struct S {
     43 ///     char a, b, c;
     44 ///     unsigned bits : 3;
     45 ///     unsigned more_bits : 4;
     46 ///     unsigned still_more_bits : 7;
     47 ///   };
     48 ///
     49 /// This will end up as the following LLVM type. The first array is the
     50 /// bitfield, and the second is the padding out to a 4-byte alignmnet.
     51 ///
     52 ///   %t = type { i8, i8, i8, i8, i8, [3 x i8] }
     53 ///
     54 /// When generating code to access more_bits, we'll generate something
     55 /// essentially like this:
     56 ///
     57 ///   define i32 @foo(%t* %base) {
     58 ///     %0 = gep %t* %base, i32 0, i32 3
     59 ///     %2 = load i8* %1
     60 ///     %3 = lshr i8 %2, 3
     61 ///     %4 = and i8 %3, 15
     62 ///     %5 = zext i8 %4 to i32
     63 ///     ret i32 %i
     64 ///   }
     65 ///
     66 struct CGBitFieldInfo {
     67   /// The offset within a contiguous run of bitfields that are represented as
     68   /// a single "field" within the LLVM struct type. This offset is in bits.
     69   unsigned Offset : 16;
     70 
     71   /// The total size of the bit-field, in bits.
     72   unsigned Size : 15;
     73 
     74   /// Whether the bit-field is signed.
     75   unsigned IsSigned : 1;
     76 
     77   /// The storage size in bits which should be used when accessing this
     78   /// bitfield.
     79   unsigned StorageSize;
     80 
     81   /// The alignment which should be used when accessing the bitfield.
     82   unsigned StorageAlignment;
     83 
     84   CGBitFieldInfo()
     85       : Offset(), Size(), IsSigned(), StorageSize(), StorageAlignment() {}
     86 
     87   CGBitFieldInfo(unsigned Offset, unsigned Size, bool IsSigned,
     88                  unsigned StorageSize, unsigned StorageAlignment)
     89       : Offset(Offset), Size(Size), IsSigned(IsSigned),
     90         StorageSize(StorageSize), StorageAlignment(StorageAlignment) {}
     91 
     92   void print(raw_ostream &OS) const;
     93   void dump() const;
     94 
     95   /// \brief Given a bit-field decl, build an appropriate helper object for
     96   /// accessing that field (which is expected to have the given offset and
     97   /// size).
     98   static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types,
     99                                  const FieldDecl *FD,
    100                                  uint64_t Offset, uint64_t Size,
    101                                  uint64_t StorageSize,
    102                                  uint64_t StorageAlignment);
    103 };
    104 
    105 /// CGRecordLayout - This class handles struct and union layout info while
    106 /// lowering AST types to LLVM types.
    107 ///
    108 /// These layout objects are only created on demand as IR generation requires.
    109 class CGRecordLayout {
    110   friend class CodeGenTypes;
    111 
    112   CGRecordLayout(const CGRecordLayout &) LLVM_DELETED_FUNCTION;
    113   void operator=(const CGRecordLayout &) LLVM_DELETED_FUNCTION;
    114 
    115 private:
    116   /// The LLVM type corresponding to this record layout; used when
    117   /// laying it out as a complete object.
    118   llvm::StructType *CompleteObjectType;
    119 
    120   /// The LLVM type for the non-virtual part of this record layout;
    121   /// used when laying it out as a base subobject.
    122   llvm::StructType *BaseSubobjectType;
    123 
    124   /// Map from (non-bit-field) struct field to the corresponding llvm struct
    125   /// type field no. This info is populated by record builder.
    126   llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
    127 
    128   /// Map from (bit-field) struct field to the corresponding llvm struct type
    129   /// field no. This info is populated by record builder.
    130   llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
    131 
    132   // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
    133   // map for both virtual and non virtual bases.
    134   llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
    135 
    136   /// Map from virtual bases to their field index in the complete object.
    137   llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
    138 
    139   /// False if any direct or indirect subobject of this class, when
    140   /// considered as a complete object, requires a non-zero bitpattern
    141   /// when zero-initialized.
    142   bool IsZeroInitializable : 1;
    143 
    144   /// False if any direct or indirect subobject of this class, when
    145   /// considered as a base subobject, requires a non-zero bitpattern
    146   /// when zero-initialized.
    147   bool IsZeroInitializableAsBase : 1;
    148 
    149 public:
    150   CGRecordLayout(llvm::StructType *CompleteObjectType,
    151                  llvm::StructType *BaseSubobjectType,
    152                  bool IsZeroInitializable,
    153                  bool IsZeroInitializableAsBase)
    154     : CompleteObjectType(CompleteObjectType),
    155       BaseSubobjectType(BaseSubobjectType),
    156       IsZeroInitializable(IsZeroInitializable),
    157       IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
    158 
    159   /// \brief Return the "complete object" LLVM type associated with
    160   /// this record.
    161   llvm::StructType *getLLVMType() const {
    162     return CompleteObjectType;
    163   }
    164 
    165   /// \brief Return the "base subobject" LLVM type associated with
    166   /// this record.
    167   llvm::StructType *getBaseSubobjectLLVMType() const {
    168     return BaseSubobjectType;
    169   }
    170 
    171   /// \brief Check whether this struct can be C++ zero-initialized
    172   /// with a zeroinitializer.
    173   bool isZeroInitializable() const {
    174     return IsZeroInitializable;
    175   }
    176 
    177   /// \brief Check whether this struct can be C++ zero-initialized
    178   /// with a zeroinitializer when considered as a base subobject.
    179   bool isZeroInitializableAsBase() const {
    180     return IsZeroInitializableAsBase;
    181   }
    182 
    183   /// \brief Return llvm::StructType element number that corresponds to the
    184   /// field FD.
    185   unsigned getLLVMFieldNo(const FieldDecl *FD) const {
    186     assert(FieldInfo.count(FD) && "Invalid field for record!");
    187     return FieldInfo.lookup(FD);
    188   }
    189 
    190   unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
    191     assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
    192     return NonVirtualBases.lookup(RD);
    193   }
    194 
    195   /// \brief Return the LLVM field index corresponding to the given
    196   /// virtual base.  Only valid when operating on the complete object.
    197   unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
    198     assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
    199     return CompleteObjectVirtualBases.lookup(base);
    200   }
    201 
    202   /// \brief Return the BitFieldInfo that corresponds to the field FD.
    203   const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
    204     assert(FD->isBitField() && "Invalid call for non bit-field decl!");
    205     llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
    206       it = BitFields.find(FD);
    207     assert(it != BitFields.end() && "Unable to find bitfield info");
    208     return it->second;
    209   }
    210 
    211   void print(raw_ostream &OS) const;
    212   void dump() const;
    213 };
    214 
    215 }  // end namespace CodeGen
    216 }  // end namespace clang
    217 
    218 #endif
    219