/external/webkit/Tools/DumpRenderTree/mac/PerlSupport/ |
DumpRenderTreeSupportPregenerated.pm | 26 sub FETCH {
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/dalvik/libdex/ |
InstrUtils.cpp | 473 #define FETCH(_offset) (insns[(_offset)]) 519 pDec->vA = (s2) FETCH(1); // sign-extend 16-bit value 525 pDec->vB = FETCH(1); 530 pDec->vB = (s2) FETCH(1); // sign-extend 16-bit value 539 pDec->vB = FETCH(1); 543 pDec->vB = FETCH(1) & 0xff; 544 pDec->vC = FETCH(1) >> 8; 548 pDec->vB = FETCH(1) & 0xff; 549 pDec->vC = (s1) (FETCH(1) >> 8); // sign-extend 8-bit value 555 pDec->vC = (s2) FETCH(1); // sign-extend 16-bit valu [all...] |
/external/elfutils/libelf/ |
gelf_xlate.c | 87 #define FETCH(Bits, ptr) (*(const uint##Bits##_t *) ptr) 99 #define FETCH(Bits, ptr) (((const union unaligned *) ptr)->u##Bits) 119 case 2: STORE (16, dest, bswap_16 (FETCH (16, ptr))); break; \ 120 case 4: STORE (32, dest, bswap_32 (FETCH (32, ptr))); break; \ 121 case 8: STORE (64, dest, bswap_64 (FETCH (64, ptr))); break; \
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/external/tcpdump/ |
print-telnet.c | 115 #define FETCH(c, sp, length) \ 126 FETCH(c, sp, length); 129 FETCH(c, sp, length); 147 FETCH(x, sp, length); 171 FETCH(c, sp, length); 176 FETCH(c, sp, length); 183 FETCH(c, sp, length); 188 FETCH(c, sp, length); 195 FETCH(c, sp, length); 201 FETCH(x, sp, length) [all...] |
/dalvik/vm/mterp/armv5te/ |
header.S | 104 * Fetch the next instruction from rPC into rINST. Does not advance rPC. 109 * Fetch the next instruction from the specified offset. Advances rPC 130 * Fetch the next instruction from an offset specified by _reg. Updates 142 * Fetch a half-word code unit from an offset past the current PC. The 147 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] 151 * Fetch one byte from an offset past the current PC. Pass in the same 152 * "_count" as you would for FETCH, and an additional 0/1 indicating which
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/dalvik/vm/mterp/c/ |
header.cpp | 270 #define FETCH(_offset) (pc[(_offset)]) 273 * Extract instruction byte from 16-bit fetch (_inst is a u2).
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/external/e2fsprogs/lib/ext2fs/ |
icount.c | 664 #define FETCH 0x01 691 { FETCH, 10, 0, 1 }, 692 { FETCH, 1, 0, 1 }, 693 { FETCH, 2, 0, 2 }, 694 { FETCH, 3, 0, 3 }, 698 { FETCH, 12, 0, 0 }, 790 case FETCH:
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/packages/apps/Email/src/com/android/email/mail/store/imap/ |
ImapConstants.java | 49 public static final String FETCH = "FETCH"; 85 public static final String UID_FETCH = "UID FETCH";
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/dalvik/vm/mterp/out/ |
InterpAsm-armv5te-vfp.S | 111 * Fetch the next instruction from rPC into rINST. Does not advance rPC. 116 * Fetch the next instruction from the specified offset. Advances rPC 137 * Fetch the next instruction from an offset specified by _reg. Updates 149 * Fetch a half-word code unit from an offset past the current PC. The 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] 158 * Fetch one byte from an offset past the current PC. Pass in the same 159 * "_count" as you would for FETCH, and an additional 0/1 indicating which 398 FETCH(r1, 1) @ r1<- BBBB 412 FETCH(r1, 2) @ r1<- BBBB 413 FETCH(r0, 1) @ r0<- AAA [all...] |
InterpAsm-armv5te.S | 111 * Fetch the next instruction from rPC into rINST. Does not advance rPC. 116 * Fetch the next instruction from the specified offset. Advances rPC 137 * Fetch the next instruction from an offset specified by _reg. Updates 149 * Fetch a half-word code unit from an offset past the current PC. The 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] 158 * Fetch one byte from an offset past the current PC. Pass in the same 159 * "_count" as you would for FETCH, and an additional 0/1 indicating which 398 FETCH(r1, 1) @ r1<- BBBB 412 FETCH(r1, 2) @ r1<- BBBB 413 FETCH(r0, 1) @ r0<- AAA [all...] |
InterpAsm-armv7-a-neon.S | 111 * Fetch the next instruction from rPC into rINST. Does not advance rPC. 116 * Fetch the next instruction from the specified offset. Advances rPC 137 * Fetch the next instruction from an offset specified by _reg. Updates 149 * Fetch a half-word code unit from an offset past the current PC. The 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] 158 * Fetch one byte from an offset past the current PC. Pass in the same 159 * "_count" as you would for FETCH, and an additional 0/1 indicating which 411 FETCH(r1, 1) @ r1<- BBBB 425 FETCH(r1, 2) @ r1<- BBBB 426 FETCH(r0, 1) @ r0<- AAA [all...] |
InterpAsm-armv7-a.S | 111 * Fetch the next instruction from rPC into rINST. Does not advance rPC. 116 * Fetch the next instruction from the specified offset. Advances rPC 137 * Fetch the next instruction from an offset specified by _reg. Updates 149 * Fetch a half-word code unit from an offset past the current PC. The 154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #((_count)*2)] 158 * Fetch one byte from an offset past the current PC. Pass in the same 159 * "_count" as you would for FETCH, and an additional 0/1 indicating which 411 FETCH(r1, 1) @ r1<- BBBB 425 FETCH(r1, 2) @ r1<- BBBB 426 FETCH(r0, 1) @ r0<- AAA [all...] |
InterpC-armv5te-vfp.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpC-armv5te.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpC-armv7-a-neon.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpC-armv7-a.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpC-allstubs.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpC-mips.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpC-portable.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 408 * instruction fetch/computed goto. 417 inst = FETCH(0); \ 540 regs = FETCH(1); \ 564 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 580 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 604 srcRegs = FETCH(1); \ 639 srcRegs = FETCH(1); \ 652 vsrc2 = FETCH(1); [all...] |
InterpC-x86.cpp | 277 #define FETCH(_offset) (pc[(_offset)]) 280 * Extract instruction byte from 16-bit fetch (_inst is a u2). 391 u2 inst = FETCH(0); \ 438 u2 inst = FETCH(0); \ 594 regs = FETCH(1); \ 618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \ 658 srcRegs = FETCH(1); \ 693 srcRegs = FETCH(1); \ 706 vsrc2 = FETCH(1); [all...] |
InterpAsm-mips.S | 96 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC) 540 FETCH(a1, 1) # a1 <- BBBB 554 FETCH(a1, 2) # a1 <- BBBB 555 FETCH(a0, 1) # a0 <- AAAA 585 FETCH(a3, 1) # a3 <- BBBB 602 FETCH(a3, 2) # a3 <- BBBB 603 FETCH(a2, 1) # a2 <- AAAA 636 FETCH(a1, 1) # a1 <- BBBB 652 FETCH(a1, 2) # a1 <- BBBB 653 FETCH(a0, 1) # a0 <- AAA [all...] |
/dalvik/vm/mterp/mips/ |
header.S | 89 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC)
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/dalvik/vm/compiler/codegen/x86/ |
Lower.h | 79 #define FETCH(_offset) (rPC[(_offset)]) [all...] |
/dalvik/vm/compiler/template/mips/ |
header.S | 163 #define FETCH(rd, _count) lhu rd, (_count * 2)(rPC)
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/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-mips.S | 170 #define FETCH(rd, _count) lhu rd, (_count * 2)(rPC) [all...] |