/external/llvm/utils/TableGen/ |
AsmWriterInst.cpp | 202 unsigned OpNo = CGI.Operands.getOperandNamed(VarName); 203 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; 207 OpNo, MIOp, Modifier));
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DAGISelMatcherGen.cpp | 315 unsigned OpNo = 0; 326 OpNo = 1; 395 for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { 398 AddMatcher(new MoveChildMatcher(OpNo)); [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
SIMCCodeEmitter.cpp | 46 bool isSrcOperand(const MCInstrDesc &Desc, unsigned OpNo) const; 77 unsigned OpNo) const { 79 unsigned RegClass = Desc.OpInfo[OpNo].RegClass; 185 unsigned OpNo = 0; 186 for (unsigned e = MI.getNumOperands(); OpNo < e; ++OpNo) { 187 if (&MO == &MI.getOperand(OpNo)) 192 if (isSrcOperand(Desc, OpNo)) {
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/external/llvm/lib/Transforms/Utils/ |
ValueMapper.cpp | 120 unsigned OpNo = 0, NumOperands = C->getNumOperands(); 122 for (; OpNo != NumOperands; ++OpNo) { 123 Value *Op = C->getOperand(OpNo); 135 if (OpNo == NumOperands && NewTy == C->getType()) 142 for (unsigned j = 0; j != OpNo; ++j) 146 if (OpNo != NumOperands) { 150 for (++OpNo; OpNo != NumOperands; ++OpNo) [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 109 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 110 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
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LegalizeVectorTypes.cpp | 350 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) { 351 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": "; 360 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": "; 380 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo); 446 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){ 448 assert(OpNo == 1 && "Do not know how to scalarize this operand!"); [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
AsmPrinterInlineAsm.cpp | 196 unsigned OpNo = InlineAsm::MIOp_FirstOperand; 202 if (OpNo >= MI->getNumOperands()) break; 203 unsigned OpFlags = MI->getOperand(OpNo).getImm(); 204 OpNo += InlineAsm::getNumOperandRegisters(OpFlags) + 1; 210 if (OpNo >= MI->getNumOperands() || 211 MI->getOperand(OpNo).isMetadata()) { 214 unsigned OpFlags = MI->getOperand(OpNo).getImm(); 215 ++OpNo; // Skip over the ID number. 218 Error = AP->PrintAsmMemoryOperand(MI, OpNo, InlineAsmVariant, 221 Error = AP->PrintAsmOperand(MI, OpNo, InlineAsmVariant [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelDAGToDAG.cpp | 63 unsigned OpNo = U.getOperandNo(); 68 if (MI->isPHI() || MI->isRegTiedToDefOperand(OpNo) || MI->isPseudo())
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/external/llvm/lib/CodeGen/ |
MachineInstr.cpp | 641 unsigned OpNo = getNumOperands(); 644 while (OpNo && Operands[OpNo-1].isReg() && Operands[OpNo-1].isImplicit()) { 645 --OpNo; 646 assert(!Operands[OpNo].isTied() && "Cannot move tied operands"); 650 // OpNo now points as the desired insertion point. Unless this is a variadic 654 OpNo < MCID->getNumOperands()) && 667 if (OpNo) 668 moveOperands(Operands, OldOperands, OpNo, MRI) [all...] |
MachineVerifier.cpp | 734 unsigned OpNo = InlineAsm::MIOp_FirstOperand; 736 for (unsigned e = MI->getNumOperands(); OpNo < e; OpNo += NumOps) { 737 const MachineOperand &MO = MI->getOperand(OpNo); 744 if (OpNo > MI->getNumOperands()) 748 if (OpNo < MI->getNumOperands() && MI->getOperand(OpNo).isMetadata()) 749 ++OpNo; 752 for (unsigned e = MI->getNumOperands(); OpNo < e; ++OpNo) { [all...] |
/external/llvm/lib/Transforms/Scalar/ |
CodeGenPrepare.cpp | [all...] |
/external/llvm/lib/IR/ |
Instructions.cpp | 252 unsigned OpNo = getNumOperands(); 254 assert(OpNo < ReservedSpace && "Growing didn't work!"); 256 OperandList[OpNo] = Val; [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |