| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.h | 69 const char *getName(unsigned RegNo) const {
71 O << "reg" << RegNo;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 64 unsigned RegNo = MO.getReg();
65 assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??");
66 O << getRegisterName(RegNo);
156 static const char *getRegisterName(unsigned RegNo);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 200 unsigned RegNo = Ctx.getRegisterInfo().getEncodingValue(Reg);
201 return RegNo;
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 26 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
27 OS << getRegisterName(RegNo);
92 unsigned RegNo;
95 case PPC::CR0: RegNo = 0; break;
96 case PPC::CR1: RegNo = 1; break;
97 case PPC::CR2: RegNo = 2; break;
98 case PPC::CR3: RegNo = 3; break;
99 case PPC::CR4: RegNo = 4; break;
100 case PPC::CR5: RegNo = 5; break;
101 case PPC::CR6: RegNo = 6; break
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 142 unsigned RegNo; // For MO_Register.
161 // Register number is in SmallContents.RegNo.
261 return SmallContents.RegNo;
577 Op.SmallContents.RegNo = Reg;
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 410 unsigned RegNo = CTX.getRegisterInfo().getEncodingValue(Reg);
415 return RegNo;
420 return 2 * RegNo;
[all...] |
| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 44 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
391 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo,
396 RegNo = Reg->getReg();
412 unsigned RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
413 if (RegNo == 0)
417 return MBlazeOperand::CreateReg(RegNo, StartLoc, EndLoc);
|
| /external/llvm/utils/TableGen/ |
| RegisterInfoEmitter.cpp | 409 int RegNo = I->second[i];
410 if (RegNo == -1) // -1 is the default value, don't emit a mapping.
413 OS << " { " << getQualifiedName(I->first) << ", " << RegNo
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 118 unsigned RegNo = getPPCRegisterNumbering(I->first);
119 if (VRRegNo[RegNo] == I->first) // If this really is a vector reg.
120 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
134 unsigned RegNo = getPPCRegisterNumbering(MO.getReg());
135 UsedRegMask &= ~(1 << (31-RegNo));
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinter.cpp | 528 unsigned RegNo = MI->getOperand(0).getReg();
530 AP.TM.getRegisterInfo()->getName(RegNo));
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 75 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
166 unsigned getReg(int RC,int RegNo);
717 unsigned MipsAsmParser::getReg(int RC,int RegNo) {
718 return *(getContext().getRegisterInfo().getRegClass(RC).begin() + RegNo);
748 int RegNo = -1;
750 RegNo = tryParseRegister(is64BitReg);
751 if (RegNo == -1)
754 Operands.push_back(MipsOperand::CreateReg(RegNo, S,
917 bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
921 RegNo = tryParseRegister(isMips64())
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 111 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
179 unsigned RegNo;
231 return Reg.RegNo;
483 static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc,
487 Res->Reg.RegNo = RegNo;
563 bool X86AsmParser::ParseRegister(unsigned &RegNo,
565 RegNo = 0;
583 RegNo = MatchRegisterName(Tok.getString());
586 if (RegNo == 0
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/MC/MCParser/ |
| AsmParser.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 266 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
[all...] |
