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    Searched defs:TBB (Results 1 - 11 of 11) sorted by null

  /external/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 142 // bposge32 $tbb
146 // $tbb:
149 // $vr0 = phi($vr2, $fbb, $vr1, $tbb)
159 MachineBasicBlock *TBB = F->CreateMachineBasicBlock(LLVM_BB);
162 F->insert(It, TBB);
172 BB->addSuccessor(TBB);
174 TBB->addSuccessor(Sink);
177 BuildMI(BB, DL, TII->get(Mips::BPOSGE32)).addMBB(TBB);
185 // Fill $TBB.
187 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), VR1
    [all...]
  /external/llvm/lib/CodeGen/
CodePlacementOpt.cpp 77 MachineBasicBlock *TBB = 0, *FBB = 0;
79 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
85 if (Cond.empty() && TBB)
106 MachineBasicBlock *TBB = 0, *FBB = 0;
109 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond))
EarlyIfConversion.cpp 71 // | [TF]BB FBB TBB
76 // Instructions in the conditional blocks TBB and/or FBB are spliced into the
93 MachineBasicBlock *TBB;
98 /// isTriangle - When there is no 'else' block, either TBB or FBB will be
100 bool isTriangle() const { return TBB == Tail || FBB == Tail; }
103 MachineBasicBlock *getTPred() const { return TBB == Tail ? Head : TBB; }
135 /// Insertion point in Head for speculatively executed instructions form TBB
341 TBB = FBB = Tail = 0;
388 if (TII->AnalyzeBranch(*Head, TBB, FBB, Cond))
    [all...]
MachineBasicBlock.cpp 354 MachineBasicBlock *TBB = 0, *FBB = 0;
357 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
361 if (TBB) {
364 if (isLayoutSuccessor(TBB))
373 assert(!TBB && "Found more than one non-landing-pad successor!");
374 TBB = *SI;
379 if (!TBB)
384 if (!isLayoutSuccessor(TBB))
385 TII->InsertBranch(*this, TBB, 0, Cond, dl);
392 if (isLayoutSuccessor(TBB)) {
    [all...]
MachineBlockPlacement.cpp     [all...]
BranchFolding.cpp 197 MachineBasicBlock *MBB = I, *TBB = 0, *FBB = 0;
199 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
200 MadeChange |= MBB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
461 MachineBasicBlock *TBB = 0, *FBB = 0;
465 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
467 if (TBB == NextBB && !Cond.empty() && !FBB) {
    [all...]
IfConversion.cpp 83 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
216 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
222 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
816 // TBB FBB
833 // | TBB
856 // | TBB---> exit
    [all...]
MachineLICM.cpp 804 MachineBasicBlock *TBB = 0, *FBB = 0;
806 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
    [all...]
MachineVerifier.cpp 541 MachineBasicBlock *TBB = 0, *FBB = 0;
544 TBB, FBB, Cond)) {
547 if (!TBB && !FBB) {
575 } else if (TBB && !FBB && Cond.empty()) {
580 } else if (!MBB->isSuccessor(TBB)) {
594 } else if (TBB && !FBB && !Cond.empty()) {
602 if (&*MBBI != TBB)
605 else if (TBB != *MBB->succ_begin())
611 } else if (!matchPair(MBB->succ_begin(), TBB, MBBI)) {
625 } else if (TBB && FBB)
    [all...]
  /external/llvm/unittests/IR/
IRBuilderTest.cpp 81 BasicBlock *TBB = BasicBlock::Create(getGlobalContext(), "", F);
84 BranchInst *BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB);
88 EXPECT_EQ(TBB, TI->getSuccessor(0));
93 BI = Builder.CreateCondBr(Builder.getTrue(), TBB, FBB, Weights);
97 EXPECT_EQ(TBB, TI->getSuccessor(0));
  /external/llvm/lib/Target/ARM/
ARMFastISel.cpp     [all...]

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