| /external/clang/test/Preprocessor/ |
| macro_paste_bad.c | 32 #define VA __VA_ ## ARGS__
33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macro}}
|
| /external/clang/test/Parser/ |
| cxx-using-declaration.cpp | 4 int VA;
9 using A::VA;
15 VA = 1;
|
| /external/skia/src/sfnt/ |
| SkOTTable_OS_2.h | 31 struct VA : SkOTTableOS2_VA { } vA;
45 SK_COMPILE_ASSERT(sizeof(SkOTTableOS2::Version::VA) == 68, sizeof_SkOTTableOS2__VA_not_68);
|
| /external/clang/test/CXX/special/class.dtor/ |
| p3-0x.cpp | 140 struct VA {
142 virtual ~VA() {}
145 struct VB : VA
149 struct TVB : VA
|
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 159 CCValAssign &VA = ArgLocs[ArgIdx++];
160 assert(VA.isRegLoc() && "Parameter must be in a register!");
162 unsigned Reg = VA.getLocReg();
163 MVT VT = VA.getLocVT();
|
| /external/mksh/src/ |
| shf.c | 776 #define VA(type) va_arg(args, type)
825 tmp = VA(int);
886 lnum = (long)VA(ssize_t);
888 lnum = VA(long);
890 lnum = (long)(short)VA(int);
892 lnum = (long)VA(int);
899 lnum = VA(size_t);
901 lnum = VA(unsigned long);
903 lnum = (unsigned long)(unsigned short)VA(int);
905 lnum = (unsigned long)VA(unsigned int)
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombinePHI.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 322 CCValAssign &VA = RVLocs[i];
324 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
328 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
434 CCValAssign &VA = ArgLocs[i];
435 if (VA.isMemLoc()) {
458 CCValAssign &VA = ArgLocs[i];
463 switch (VA.getLocInfo()) {
470 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
473 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg)
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 729 CCValAssign &VA = ArgLocs[i];
730 MVT RegVT = VA.getLocVT();
734 switch (VA.getLocInfo()) {
750 if (VA.isRegLoc()) {
751 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
754 assert(VA.isMemLoc());
762 unsigned ArgSize = VA.getValVT().getSizeInBits()/8;
763 unsigned StackLoc = VA.getLocMemOffset() + 4;
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 335 CCValAssign &VA = ArgLocs[i];
336 if (VA.isRegLoc()) {
338 EVT RegVT = VA.getLocVT();
350 RegInfo.addLiveIn(VA.getLocReg(), VReg);
356 if (VA.getLocInfo() == CCValAssign::SExt)
358 DAG.getValueType(VA.getValVT()));
359 else if (VA.getLocInfo() == CCValAssign::ZExt)
361 DAG.getValueType(VA.getValVT()));
363 if (VA.getLocInfo() != CCValAssign::Full)
364 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue)
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 105 CCValAssign &VA = RVLocs[i];
106 assert(VA.isRegLoc() && "Can only return in registers!");
108 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
113 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
166 CCValAssign &VA = ArgLocs[i];
179 if (VA.isRegLoc()) {
180 if (VA.needsCustom()) {
181 assert(VA.getLocVT() == MVT::f64);
183 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi)
[all...] |
| /external/webkit/Source/WebKit/android/content/ |
| address_detector.cpp | 722 VA = 52, // VA Virginia
753 DC, VA, DC, DC, DC, DC, MD, MD, MD, MD, // 200-209
755 VA, VA, VA, VA, VA, VA, VA, VA, VA, VA, // 220-22
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 764 CCValAssign &VA = ValLocs[0];
767 if (VA.getLocInfo() != CCValAssign::Full)
770 if (!VA.isRegLoc())
775 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1)
778 unsigned SrcReg = Reg + VA.getValNo();
780 EVT DstVT = VA.getValVT();
804 unsigned DstReg = VA.getLocReg();
813 RetRegs.push_back(VA.getLocReg());
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/qemu/ |
| ppc-dis.c | 820 /* The VA field in a VA, VX or VXR form instruction. */
821 #define VA UI + 1
824 /* The VB field in a VA, VX or VXR form instruction. */
825 #define VB VA + 1
828 /* The VC field in a VA form instruction. */
832 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
846 /* The SHB field in a VA form instruction. */
[all...] |
