1 #ifndef __ARCH_DESC_H 2 #define __ARCH_DESC_H 3 4 #include <asm/ldt.h> 5 #include <asm/segment.h> 6 7 #ifndef __ASSEMBLY__ 8 9 #include <linux/preempt.h> 10 #include <linux/smp.h> 11 #include <linux/percpu.h> 12 13 #include <asm/mmu.h> 14 15 struct Xgt_desc_struct { 16 unsigned short size; 17 unsigned long address __attribute__((packed)); 18 unsigned short pad; 19 } __attribute__ ((packed)); 20 21 struct gdt_page 22 { 23 struct desc_struct gdt[GDT_ENTRIES]; 24 } __attribute__((aligned(PAGE_SIZE))); 25 DECLARE_PER_CPU(struct gdt_page, gdt_page); 26 27 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu) 28 { 29 return per_cpu(gdt_page, cpu).gdt; 30 } 31 32 extern struct Xgt_desc_struct idt_descr; 33 extern struct desc_struct idt_table[]; 34 extern void set_intr_gate(unsigned int irq, void * addr); 35 36 static inline void pack_descriptor(__u32 *a, __u32 *b, 37 unsigned long base, unsigned long limit, unsigned char type, unsigned char flags) 38 { 39 *a = ((base & 0xffff) << 16) | (limit & 0xffff); 40 *b = (base & 0xff000000) | ((base & 0xff0000) >> 16) | 41 (limit & 0x000f0000) | ((type & 0xff) << 8) | ((flags & 0xf) << 20); 42 } 43 44 static inline void pack_gate(__u32 *a, __u32 *b, 45 unsigned long base, unsigned short seg, unsigned char type, unsigned char flags) 46 { 47 *a = (seg << 16) | (base & 0xffff); 48 *b = (base & 0xffff0000) | ((type & 0xff) << 8) | (flags & 0xff); 49 } 50 51 #define DESCTYPE_LDT 0x82 /* present, system, DPL-0, LDT */ 52 #define DESCTYPE_TSS 0x89 /* present, system, DPL-0, 32-bit TSS */ 53 #define DESCTYPE_TASK 0x85 /* present, system, DPL-0, task gate */ 54 #define DESCTYPE_INT 0x8e /* present, system, DPL-0, interrupt gate */ 55 #define DESCTYPE_TRAP 0x8f /* present, system, DPL-0, trap gate */ 56 #define DESCTYPE_DPL3 0x60 /* DPL-3 */ 57 #define DESCTYPE_S 0x10 /* !system */ 58 59 #ifdef CONFIG_PARAVIRT 60 #include <asm/paravirt.h> 61 #else 62 #define load_TR_desc() native_load_tr_desc() 63 #define load_gdt(dtr) native_load_gdt(dtr) 64 #define load_idt(dtr) native_load_idt(dtr) 65 #define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr)) 66 #define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt)) 67 68 #define store_gdt(dtr) native_store_gdt(dtr) 69 #define store_idt(dtr) native_store_idt(dtr) 70 #define store_tr(tr) (tr = native_store_tr()) 71 #define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt)) 72 73 #define load_TLS(t, cpu) native_load_tls(t, cpu) 74 #define set_ldt native_set_ldt 75 76 #define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) 77 #define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) 78 #define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) 79 #endif 80 81 static inline void write_dt_entry(struct desc_struct *dt, 82 int entry, u32 entry_low, u32 entry_high) 83 { 84 dt[entry].a = entry_low; 85 dt[entry].b = entry_high; 86 } 87 88 static inline void native_set_ldt(const void *addr, unsigned int entries) 89 { 90 if (likely(entries == 0)) 91 __asm__ __volatile__("lldt %w0"::"q" (0)); 92 else { 93 unsigned cpu = smp_processor_id(); 94 __u32 a, b; 95 96 pack_descriptor(&a, &b, (unsigned long)addr, 97 entries * sizeof(struct desc_struct) - 1, 98 DESCTYPE_LDT, 0); 99 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, a, b); 100 __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)); 101 } 102 } 103 104 105 static inline void native_load_tr_desc(void) 106 { 107 asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8)); 108 } 109 110 static inline void native_load_gdt(const struct Xgt_desc_struct *dtr) 111 { 112 asm volatile("lgdt %0"::"m" (*dtr)); 113 } 114 115 static inline void native_load_idt(const struct Xgt_desc_struct *dtr) 116 { 117 asm volatile("lidt %0"::"m" (*dtr)); 118 } 119 120 static inline void native_store_gdt(struct Xgt_desc_struct *dtr) 121 { 122 asm ("sgdt %0":"=m" (*dtr)); 123 } 124 125 static inline void native_store_idt(struct Xgt_desc_struct *dtr) 126 { 127 asm ("sidt %0":"=m" (*dtr)); 128 } 129 130 static inline unsigned long native_store_tr(void) 131 { 132 unsigned long tr; 133 asm ("str %0":"=r" (tr)); 134 return tr; 135 } 136 137 static inline void native_load_tls(struct thread_struct *t, unsigned int cpu) 138 { 139 unsigned int i; 140 struct desc_struct *gdt = get_cpu_gdt_table(cpu); 141 142 for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++) 143 gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]; 144 } 145 146 static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg) 147 { 148 __u32 a, b; 149 pack_gate(&a, &b, (unsigned long)addr, seg, type, 0); 150 write_idt_entry(idt_table, gate, a, b); 151 } 152 153 static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, const void *addr) 154 { 155 __u32 a, b; 156 pack_descriptor(&a, &b, (unsigned long)addr, 157 offsetof(struct tss_struct, __cacheline_filler) - 1, 158 DESCTYPE_TSS, 0); 159 write_gdt_entry(get_cpu_gdt_table(cpu), entry, a, b); 160 } 161 162 163 #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr) 164 165 #define LDT_entry_a(info) \ 166 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) 167 168 #define LDT_entry_b(info) \ 169 (((info)->base_addr & 0xff000000) | \ 170 (((info)->base_addr & 0x00ff0000) >> 16) | \ 171 ((info)->limit & 0xf0000) | \ 172 (((info)->read_exec_only ^ 1) << 9) | \ 173 ((info)->contents << 10) | \ 174 (((info)->seg_not_present ^ 1) << 15) | \ 175 ((info)->seg_32bit << 22) | \ 176 ((info)->limit_in_pages << 23) | \ 177 ((info)->useable << 20) | \ 178 0x7000) 179 180 #define LDT_empty(info) (\ 181 (info)->base_addr == 0 && \ 182 (info)->limit == 0 && \ 183 (info)->contents == 0 && \ 184 (info)->read_exec_only == 1 && \ 185 (info)->seg_32bit == 0 && \ 186 (info)->limit_in_pages == 0 && \ 187 (info)->seg_not_present == 1 && \ 188 (info)->useable == 0 ) 189 190 static inline void clear_LDT(void) 191 { 192 set_ldt(NULL, 0); 193 } 194 195 /* 196 * load one particular LDT into the current CPU 197 */ 198 static inline void load_LDT_nolock(mm_context_t *pc) 199 { 200 set_ldt(pc->ldt, pc->size); 201 } 202 203 static inline void load_LDT(mm_context_t *pc) 204 { 205 preempt_disable(); 206 load_LDT_nolock(pc); 207 preempt_enable(); 208 } 209 210 static inline unsigned long get_desc_base(unsigned long *desc) 211 { 212 unsigned long base; 213 base = ((desc[0] >> 16) & 0x0000ffff) | 214 ((desc[1] << 16) & 0x00ff0000) | 215 (desc[1] & 0xff000000); 216 return base; 217 } 218 219 #else /* __ASSEMBLY__ */ 220 221 /* 222 * GET_DESC_BASE reads the descriptor base of the specified segment. 223 * 224 * Args: 225 * idx - descriptor index 226 * gdt - GDT pointer 227 * base - 32bit register to which the base will be written 228 * lo_w - lo word of the "base" register 229 * lo_b - lo byte of the "base" register 230 * hi_b - hi byte of the low word of the "base" register 231 * 232 * Example: 233 * GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah) 234 * Will read the base address of GDT_ENTRY_ESPFIX_SS and put it into %eax. 235 */ 236 #define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) \ 237 movb idx*8+4(gdt), lo_b; \ 238 movb idx*8+7(gdt), hi_b; \ 239 shll $16, base; \ 240 movw idx*8+2(gdt), lo_w; 241 242 #endif /* !__ASSEMBLY__ */ 243 244 #endif 245
