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    Searched defs:isKill (Results 1 - 13 of 13) sorted by null

  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 335 bool isKill = Op.hasOneUse() &&
339 if (isKill) {
347 isKill = false;
350 MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) |
    [all...]
  /external/llvm/lib/Target/ARM/
Thumb1RegisterInfo.cpp 268 bool isKill = BaseReg != ARM::SP;
272 MIB.addReg(BaseReg, getKillRegState(isKill)).addImm(ThisVal);
Thumb1FrameLowering.cpp 346 bool isKill = true;
355 isKill = false;
358 if (isKill)
361 MIB.addReg(Reg, getKillRegState(isKill));
ARMFrameLowering.cpp 606 bool isKill = true;
610 isKill = false;
613 if (isKill)
622 Regs.push_back(std::make_pair(Reg, isKill));
    [all...]
ARMLoadStoreOptimizer.cpp 82 bool isKill;
88 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {}
386 if (memOps[i].Position < insertPos && memOps[i].isKill) {
399 bool isKill = memOps[i].isKill || KilledRegs.count(Reg);
400 Regs.push_back(std::make_pair(Reg, isKill));
430 memOps[j].isKill = false;
432 memOps[i].isKill = true;
716 bool BaseKill = MI->getOperand(0).isKill();
852 bool BaseKill = MI->getOperand(1).isKill();
    [all...]
ARMBaseInstrInfo.cpp 249 if (MO.isUse() && MO.isKill()) {
764 unsigned SrcReg, bool isKill, int FI,
783 .addReg(SrcReg, getKillRegState(isKill))
787 .addReg(SrcReg, getKillRegState(isKill))
795 .addReg(SrcReg, getKillRegState(isKill))
802 MIB = AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
813 .addReg(SrcReg, getKillRegState(isKill))
817 .addReg(SrcReg, getKillRegState(isKill))
830 .addReg(SrcReg, getKillRegState(isKill))
837 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI)
    [all...]
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 153 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill();
177 .addReg(Reg, getKillRegState(isKill))
198 .addReg(Reg, getKillRegState(isKill))
227 .addReg(Reg, getKillRegState(isKill))
  /external/llvm/lib/CodeGen/
MachineInstrBundle.cpp 139 if (MO.isKill())
148 if (MO.isKill())
198 bool isKill = KilledUseSet.count(Reg);
200 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) |
307 PRI.Kills = MO.isKill();
LiveIntervalAnalysis.cpp 820 bool isKill = SlotIndex::isSameInstr(OldIdx, I->end);
835 if (!isKill)
    [all...]
MachineLICM.cpp 773 return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
827 bool isKill = isOperandKill(MO, MRI);
828 if (isNew && !isKill)
831 else if (!isNew && isKill)
    [all...]
TwoAddressInstructionPass.cpp 226 if (!UseMO.isKill())
269 if (MO.isKill() || (LIS && isPlainlyKilled(OtherMI, MOReg, LIS))) {
807 if (MOReg != Reg && (MO.isKill() ||
858 bool isKill = MO.isKill() ||
861 ((isKill && Uses.count(MOReg)) || Kills.count(MOReg)))
864 if (MOReg == Reg && !isKill)
    [all...]
  /external/llvm/include/llvm/CodeGen/
MachineOperand.h 79 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
90 /// IsKill - True if this instruction is the last use of the register on this
92 bool IsKill : 1;
289 bool isKill() const {
291 return IsKill;
370 IsKill = Val;
516 /// operand. Note: This method ignores isKill and isDead properties.
535 bool isKill = false, bool isDead = false,
561 bool isKill = false, bool isDead = false,
570 Op.IsKill = isKill
    [all...]
  /external/llvm/lib/Target/X86/
X86InstrInfo.cpp     [all...]

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