1 ; RUN: llc < %s -march=x86-64 -mattr=+bmi,+bmi2 | FileCheck %s 2 3 declare i8 @llvm.cttz.i8(i8, i1) nounwind readnone 4 declare i16 @llvm.cttz.i16(i16, i1) nounwind readnone 5 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone 6 declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone 7 8 define i8 @t1(i8 %x) nounwind { 9 %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 false ) 10 ret i8 %tmp 11 ; CHECK: t1: 12 ; CHECK: tzcntl 13 } 14 15 define i16 @t2(i16 %x) nounwind { 16 %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 false ) 17 ret i16 %tmp 18 ; CHECK: t2: 19 ; CHECK: tzcntw 20 } 21 22 define i32 @t3(i32 %x) nounwind { 23 %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 false ) 24 ret i32 %tmp 25 ; CHECK: t3: 26 ; CHECK: tzcntl 27 } 28 29 define i32 @tzcnt32_load(i32* %x) nounwind { 30 %x1 = load i32* %x 31 %tmp = tail call i32 @llvm.cttz.i32(i32 %x1, i1 false ) 32 ret i32 %tmp 33 ; CHECK: tzcnt32_load: 34 ; CHECK: tzcntl ({{.*}}) 35 } 36 37 define i64 @t4(i64 %x) nounwind { 38 %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 false ) 39 ret i64 %tmp 40 ; CHECK: t4: 41 ; CHECK: tzcntq 42 } 43 44 define i8 @t5(i8 %x) nounwind { 45 %tmp = tail call i8 @llvm.cttz.i8( i8 %x, i1 true ) 46 ret i8 %tmp 47 ; CHECK: t5: 48 ; CHECK: tzcntl 49 } 50 51 define i16 @t6(i16 %x) nounwind { 52 %tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 true ) 53 ret i16 %tmp 54 ; CHECK: t6: 55 ; CHECK: tzcntw 56 } 57 58 define i32 @t7(i32 %x) nounwind { 59 %tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true ) 60 ret i32 %tmp 61 ; CHECK: t7: 62 ; CHECK: tzcntl 63 } 64 65 define i64 @t8(i64 %x) nounwind { 66 %tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 true ) 67 ret i64 %tmp 68 ; CHECK: t8: 69 ; CHECK: tzcntq 70 } 71 72 define i32 @andn32(i32 %x, i32 %y) nounwind readnone { 73 %tmp1 = xor i32 %x, -1 74 %tmp2 = and i32 %y, %tmp1 75 ret i32 %tmp2 76 ; CHECK: andn32: 77 ; CHECK: andnl 78 } 79 80 define i32 @andn32_load(i32 %x, i32* %y) nounwind readnone { 81 %y1 = load i32* %y 82 %tmp1 = xor i32 %x, -1 83 %tmp2 = and i32 %y1, %tmp1 84 ret i32 %tmp2 85 ; CHECK: andn32_load: 86 ; CHECK: andnl ({{.*}}) 87 } 88 89 define i64 @andn64(i64 %x, i64 %y) nounwind readnone { 90 %tmp1 = xor i64 %x, -1 91 %tmp2 = and i64 %tmp1, %y 92 ret i64 %tmp2 93 ; CHECK: andn64: 94 ; CHECK: andnq 95 } 96 97 define i32 @bextr32(i32 %x, i32 %y) nounwind readnone { 98 %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y) 99 ret i32 %tmp 100 ; CHECK: bextr32: 101 ; CHECK: bextrl 102 } 103 104 define i32 @bextr32_load(i32* %x, i32 %y) nounwind readnone { 105 %x1 = load i32* %x 106 %tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x1, i32 %y) 107 ret i32 %tmp 108 ; CHECK: bextr32_load: 109 ; CHECK: bextrl {{.*}}, ({{.*}}), {{.*}} 110 } 111 112 declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone 113 114 define i64 @bextr64(i64 %x, i64 %y) nounwind readnone { 115 %tmp = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %y) 116 ret i64 %tmp 117 ; CHECK: bextr64: 118 ; CHECK: bextrq 119 } 120 121 declare i64 @llvm.x86.bmi.bextr.64(i64, i64) nounwind readnone 122 123 define i32 @bzhi32(i32 %x, i32 %y) nounwind readnone { 124 %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y) 125 ret i32 %tmp 126 ; CHECK: bzhi32: 127 ; CHECK: bzhil 128 } 129 130 define i32 @bzhi32_load(i32* %x, i32 %y) nounwind readnone { 131 %x1 = load i32* %x 132 %tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x1, i32 %y) 133 ret i32 %tmp 134 ; CHECK: bzhi32_load: 135 ; CHECK: bzhil {{.*}}, ({{.*}}), {{.*}} 136 } 137 138 declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) nounwind readnone 139 140 define i64 @bzhi64(i64 %x, i64 %y) nounwind readnone { 141 %tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y) 142 ret i64 %tmp 143 ; CHECK: bzhi64: 144 ; CHECK: bzhiq 145 } 146 147 declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) nounwind readnone 148 149 define i32 @blsi32(i32 %x) nounwind readnone { 150 %tmp = sub i32 0, %x 151 %tmp2 = and i32 %x, %tmp 152 ret i32 %tmp2 153 ; CHECK: blsi32: 154 ; CHECK: blsil 155 } 156 157 define i32 @blsi32_load(i32* %x) nounwind readnone { 158 %x1 = load i32* %x 159 %tmp = sub i32 0, %x1 160 %tmp2 = and i32 %x1, %tmp 161 ret i32 %tmp2 162 ; CHECK: blsi32_load: 163 ; CHECK: blsil ({{.*}}) 164 } 165 166 define i64 @blsi64(i64 %x) nounwind readnone { 167 %tmp = sub i64 0, %x 168 %tmp2 = and i64 %tmp, %x 169 ret i64 %tmp2 170 ; CHECK: blsi64: 171 ; CHECK: blsiq 172 } 173 174 define i32 @blsmsk32(i32 %x) nounwind readnone { 175 %tmp = sub i32 %x, 1 176 %tmp2 = xor i32 %x, %tmp 177 ret i32 %tmp2 178 ; CHECK: blsmsk32: 179 ; CHECK: blsmskl 180 } 181 182 define i32 @blsmsk32_load(i32* %x) nounwind readnone { 183 %x1 = load i32* %x 184 %tmp = sub i32 %x1, 1 185 %tmp2 = xor i32 %x1, %tmp 186 ret i32 %tmp2 187 ; CHECK: blsmsk32_load: 188 ; CHECK: blsmskl ({{.*}}) 189 } 190 191 define i64 @blsmsk64(i64 %x) nounwind readnone { 192 %tmp = sub i64 %x, 1 193 %tmp2 = xor i64 %tmp, %x 194 ret i64 %tmp2 195 ; CHECK: blsmsk64: 196 ; CHECK: blsmskq 197 } 198 199 define i32 @blsr32(i32 %x) nounwind readnone { 200 %tmp = sub i32 %x, 1 201 %tmp2 = and i32 %x, %tmp 202 ret i32 %tmp2 203 ; CHECK: blsr32: 204 ; CHECK: blsrl 205 } 206 207 define i32 @blsr32_load(i32* %x) nounwind readnone { 208 %x1 = load i32* %x 209 %tmp = sub i32 %x1, 1 210 %tmp2 = and i32 %x1, %tmp 211 ret i32 %tmp2 212 ; CHECK: blsr32_load: 213 ; CHECK: blsrl ({{.*}}) 214 } 215 216 define i64 @blsr64(i64 %x) nounwind readnone { 217 %tmp = sub i64 %x, 1 218 %tmp2 = and i64 %tmp, %x 219 ret i64 %tmp2 220 ; CHECK: blsr64: 221 ; CHECK: blsrq 222 } 223 224 define i32 @pdep32(i32 %x, i32 %y) nounwind readnone { 225 %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y) 226 ret i32 %tmp 227 ; CHECK: pdep32: 228 ; CHECK: pdepl 229 } 230 231 define i32 @pdep32_load(i32 %x, i32* %y) nounwind readnone { 232 %y1 = load i32* %y 233 %tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y1) 234 ret i32 %tmp 235 ; CHECK: pdep32_load: 236 ; CHECK: pdepl ({{.*}}) 237 } 238 239 declare i32 @llvm.x86.bmi.pdep.32(i32, i32) nounwind readnone 240 241 define i64 @pdep64(i64 %x, i64 %y) nounwind readnone { 242 %tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y) 243 ret i64 %tmp 244 ; CHECK: pdep64: 245 ; CHECK: pdepq 246 } 247 248 declare i64 @llvm.x86.bmi.pdep.64(i64, i64) nounwind readnone 249 250 define i32 @pext32(i32 %x, i32 %y) nounwind readnone { 251 %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y) 252 ret i32 %tmp 253 ; CHECK: pext32: 254 ; CHECK: pextl 255 } 256 257 define i32 @pext32_load(i32 %x, i32* %y) nounwind readnone { 258 %y1 = load i32* %y 259 %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y1) 260 ret i32 %tmp 261 ; CHECK: pext32_load: 262 ; CHECK: pextl ({{.*}}) 263 } 264 265 declare i32 @llvm.x86.bmi.pext.32(i32, i32) nounwind readnone 266 267 define i64 @pext64(i64 %x, i64 %y) nounwind readnone { 268 %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y) 269 ret i64 %tmp 270 ; CHECK: pext64: 271 ; CHECK: pextq 272 } 273 274 declare i64 @llvm.x86.bmi.pext.64(i64, i64) nounwind readnone 275 276
