| /external/v8/src/ |
| regexp-macro-assembler-irregexp-inl.h | 48 Expand();
58 Expand();
68 Expand();
|
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 99 // We cannot sextinreg, expand to shifts
101 setOperationAction(ISD::SUBE, VT, Expand);
102 setOperationAction(ISD::SUBC, VT, Expand);
103 setOperationAction(ISD::ADDE, VT, Expand);
104 setOperationAction(ISD::ADDC, VT, Expand);
106 setOperationAction(ISD::BR_JT, VT, Expand);
107 setOperationAction(ISD::BRIND, VT, Expand);
109 setOperationAction(ISD::SREM, VT, Expand);
110 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
111 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 72 setOperationAction(ISD::FREM, MVT::f32, Expand);
73 setOperationAction(ISD::FMA, MVT::f32, Expand);
74 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Expand);
75 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Expand);
76 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
77 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
78 setOperationAction(ISD::FP_ROUND, MVT::f32, Expand);
79 setOperationAction(ISD::FP_ROUND, MVT::f64, Expand);
80 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
81 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
[all...] |
| /external/ppp/pppd/ |
| pppcrypt.c | 78 Expand(in, out)
93 /* The inverse of Expand
120 Expand(des_key, crypt_key);
135 Expand(clear, des_input);
151 Expand(cipher, des_input);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 699 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
703 setTruncStoreAction(MVT::f64, MVT::f32, Expand);
711 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
712 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
713 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
716 setOperationAction(ISD::UREM, MVT::i32, Expand);
717 setOperationAction(ISD::SREM, MVT::i32, Expand);
718 setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
719 setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
721 // Custom expand fp<->sin
[all...] |
| /external/clang/lib/CodeGen/ |
| ABIInfo.h | 62 /// Expand - Only valid for aggregate argument types. The structure should
64 /// Currently expand is only allowed on structures whose fields
66 Expand,
68 KindFirst=Direct, KindLast=Expand
116 return ABIArgInfo(Expand, 0, 0, false, false, false, false, 0);
120 return ABIArgInfo(Expand, 0, 0, false, false, false, PaddingInReg,
129 bool isExpand() const { return TheKind == Expand; }
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 89 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
90 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
93 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
101 setOperationAction(ISD::ROTL, MVT::i8, Expand);
102 setOperationAction(ISD::ROTR, MVT::i8, Expand);
103 setOperationAction(ISD::ROTL, MVT::i16, Expand);
104 setOperationAction(ISD::ROTR, MVT::i16, Expand);
108 setOperationAction(ISD::BR_JT, MVT::Other, Expand);
111 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
114 setOperationAction(ISD::SELECT, MVT::i8, Expand);
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 632 // Default all indexed load / store to expand.
635 setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
636 setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
639 // These operations default to expand.
640 setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
641 setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
645 setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
647 // ConstantFP nodes default to expand. Targets can either change this to
650 setOperationAction(ISD::ConstantFP, MVT::f16, Expand);
651 setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
[all...] |
| /external/webkit/LayoutTests/fast/js/resources/ |
| string-concatenate-outofmemory.js | 5 shouldThrow('s = "a"; while (1) { s += s; }', '"Error: Out of memory"'); // Expand at end of string
6 shouldThrow('s = "a"; while (1) { s += ("a" + s); }', '"Error: Out of memory"'); // Expand at beginning of string
7 shouldThrow('s = "a"; while (1) { s = [s, s].join(); }', '"Error: Out of memory"'); // Expand using UString::append.
25 s += s; // This will expand the string at the end using UString::expandCapacity
35 s += t; // This will expand the string at the beginning using UString::expandPreCapacity
47 s = [s, s].join(); // This will expand the string using UString::append.
|
| /external/srec/tools/thirdparty/OpenFst/fst/lib/ |
| arcsort.h | 124 Expand(s);
130 Expand(s);
136 Expand(s);
146 Expand(s);
150 void Expand(StateId s) {
270 fst.impl_->Expand(s);
|
| rmepsilon.h | 69 void Expand(StateId s);
137 void RmEpsilonState<Arc,Queue>::Expand(typename Arc::StateId source) {
249 rmeps_state.Expand(state);
358 Expand(s);
365 Expand(s);
371 Expand(s);
377 Expand(s);
383 Expand(s);
387 void Expand(StateId s) {
388 rmeps_state_.Expand(s)
[all...] |
| factor-weight.h | 206 Expand(s);
212 Expand(s);
218 Expand(s);
224 Expand(s);
255 void Expand(StateId s) {
433 fst.impl_->Expand(s);
|
| relabel.h | 248 Expand(s);
255 Expand(s);
262 Expand(s);
269 Expand(s);
274 void Expand(StateId s) {
452 fst.impl_->Expand(s);
|
| synchronize.h | 120 Expand(s);
126 Expand(s);
132 Expand(s);
138 Expand(s);
208 void Expand(StateId s) {
416 fst.impl_->Expand(s);
|
| determinize.h | 165 virtual void Expand(StateId s) = 0;
169 Expand(s);
175 Expand(s);
181 Expand(s);
187 Expand(s);
288 virtual void Expand(StateId s) {
498 virtual void Expand(StateId s) {
664 fst.impl_->Expand(s);
|
| /external/openfst/src/include/fst/ |
| rmepsilon.h | 84 void Expand(StateId s);
148 StateId expand_id_; // Unique ID for each call to Expand
160 void RmEpsilonState<Arc,Queue>::Expand(typename Arc::StateId source) {
299 rmeps_state.Expand(state);
441 Expand(s);
448 Expand(s);
454 Expand(s);
460 Expand(s);
476 Expand(s);
480 void Expand(StateId s)
[all...] |
| synchronize.h | 142 Expand(s);
148 Expand(s);
154 Expand(s);
169 Expand(s);
239 void Expand(StateId s) {
414 fst.GetImpl()->Expand(s);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 63 // instructions on AArch64. It's marginally simpler to let LLVM expand
81 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
82 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
83 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
113 setOperationAction(ISD::BR_JT, MVT::Other, Expand);
119 setOperationAction(ISD::VAEND, MVT::Other, Expand);
120 setOperationAction(ISD::VAARG, MVT::Other, Expand);
124 setOperationAction(ISD::ROTL, MVT::i32, Expand);
125 setOperationAction(ISD::ROTL, MVT::i64, Expand);
127 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.cpp | 30 "mips16-dont-expand-cond-pseudo",
32 cl::desc("Dont expand conditional move related "
56 setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
57 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand);
58 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand);
59 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand);
60 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand);
61 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);
62 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand);
63 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand);
[all...] |
| MipsISelLowering.cpp | 216 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
217 setTruncStoreAction(MVT::f64, MVT::f32, Expand);
270 setOperationAction(ISD::SDIV, MVT::i32, Expand);
271 setOperationAction(ISD::SREM, MVT::i32, Expand);
272 setOperationAction(ISD::UDIV, MVT::i32, Expand);
273 setOperationAction(ISD::UREM, MVT::i32, Expand);
274 setOperationAction(ISD::SDIV, MVT::i64, Expand);
275 setOperationAction(ISD::SREM, MVT::i64, Expand);
276 setOperationAction(ISD::UDIV, MVT::i64, Expand);
277 setOperationAction(ISD::UREM, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 92 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
94 setTruncStoreAction(MVT::f64, MVT::f32, Expand);
113 setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand);
114 setOperationAction(ISD::FCEIL, MVT::ppcf128, Expand);
115 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand);
116 setOperationAction(ISD::FRINT, MVT::ppcf128, Expand);
117 setOperationAction(ISD::FNEARBYINT, MVT::ppcf128, Expand);
120 setOperationAction(ISD::SREM, MVT::i32, Expand);
121 setOperationAction(ISD::UREM, MVT::i32, Expand);
122 setOperationAction(ISD::SREM, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 175 case TargetLowering::Expand:
285 case TargetLowering::Expand:
593 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand ||
594 TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand ||
595 TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand ||
596 TLI.getOperationAction(ISD::BUILD_VECTOR, VT) == TargetLowering::Expand)
636 if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Expand ||
637 TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Expand)
669 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand ||
670 TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand ||
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 240 setTruncStoreAction(MVT::i64, MVT::i32, Expand);
241 setTruncStoreAction(MVT::i64, MVT::i16, Expand);
242 setTruncStoreAction(MVT::i64, MVT::i8 , Expand);
243 setTruncStoreAction(MVT::i32, MVT::i16, Expand);
244 setTruncStoreAction(MVT::i32, MVT::i8 , Expand);
245 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
248 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand);
249 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand);
250 setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand);
251 setCondCodeAction(ISD::SETUNE, MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 103 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
104 setOperationAction(ISD::BR_CC, MVT::f32, Expand);
105 setOperationAction(ISD::BR_CC, MVT::f64, Expand);
106 setOperationAction(ISD::BR_CC, MVT::i1, Expand);
107 setOperationAction(ISD::BR_CC, MVT::i8, Expand);
108 setOperationAction(ISD::BR_CC, MVT::i16, Expand);
109 setOperationAction(ISD::BR_CC, MVT::i32, Expand);
110 setOperationAction(ISD::BR_CC, MVT::i64, Expand);
111 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i64, Expand);
112 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Expand);
[all...] |
