/external/clang/lib/CodeGen/ |
ABIInfo.h | 78 bool InReg; 84 BoolData1(B1), InReg(IR), PaddingInReg(PIR) {} 161 return InReg;
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CGCall.cpp | [all...] |
TargetInfo.cpp | 931 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding); 934 if (InReg) 938 if (InReg) [all...] |
/external/llvm/include/llvm/Target/ |
TargetCallingConv.h | 31 static const uint64_t InReg = 1ULL<<2; ///< Passed in register 60 bool isInReg() const { return Flags & InReg; }
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TargetLowering.h | [all...] |
/external/llvm/include/llvm/IR/ |
Attributes.h | 72 InReg, ///< Force argument to be passed in register
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/external/llvm/lib/IR/ |
Verifier.cpp | 681 Attrs.hasAttribute(Idx, Attribute::InReg)) || 683 Attrs.hasAttribute(Idx, Attribute::InReg))), "Attributes " 684 "'byval, nest, and inreg' are incompatible!", V); 778 Attribute::InReg)) || 782 Attribute::InReg))), 783 "Attributes 'byval, nest, and inreg' are incompatible!", V); [all...] |
Attributes.cpp | 164 if (hasAttribute(Attribute::InReg)) 165 return "inreg"; 366 case Attribute::InReg: return 1 << 3; [all...] |
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
/external/llvm/lib/Target/CppBackend/ |
CPPBackend.cpp | 490 HANDLE_ATTR(InReg); [all...] |
/external/llvm/lib/AsmParser/ |
LLParser.cpp | [all...] |