/external/llvm/tools/llvm-objdump/ |
MCFunction.cpp | 35 std::vector<MCDecodedInst> Instructions; 57 Instructions.push_back(MCDecodedInst(Index, Size, Inst)); 92 std::sort(Instructions.begin(), Instructions.end()); 95 unsigned ii = 0, ie = Instructions.size(); 100 // Add instructions to the BB. 102 if (Instructions[ii].Address < *spi || 103 Instructions[ii].Address >= BlockEnd) 105 BB.addInst(Instructions[ii]);
|
/external/llvm/utils/TableGen/ |
CodeGenTarget.h | 68 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions; 150 if (Instructions.empty()) ReadInstructions(); 151 return Instructions; 156 if (Instructions.empty()) ReadInstructions(); 158 Instructions.find(InstRec); 159 assert(I != Instructions.end() && "Not an instruction"); 163 /// getInstructionsByEnumValue - Return all of the instructions defined by the
|
AsmWriterEmitter.cpp | 80 /// instructions that are suitably similar to it. 94 // If this differs in the same operand as the rest of the instructions in 110 // If the operand is the same for all instructions, just print it. 113 // If this is the operand that varies between all of the instructions, 144 // instructions each case are used for. It is a comma separated string of 181 // For each entry of UniqueOperandCommands, there is a set of instructions 182 // that uses it. If the next command of all instructions in the set are 200 // Otherwise, scan to see if all of the other instructions in this command 236 // Prepend some of the instructions each case is used for onto the case val. 290 std::vector<AsmWriterInst> Instructions; [all...] |
/external/llvm/lib/MC/ |
MCStreamer.cpp | 268 CurFrame->Instructions.push_back(Instruction); 276 CurFrame->Instructions.push_back(Instruction); 284 CurFrame->Instructions.push_back(Instruction); 292 CurFrame->Instructions.push_back(Instruction); 300 CurFrame->Instructions.push_back(Instruction); 308 CurFrame->Instructions.push_back(Instruction); 330 CurFrame->Instructions.push_back(Instruction); 338 CurFrame->Instructions.push_back(Instruction); 346 CurFrame->Instructions.push_back(Instruction); 354 CurFrame->Instructions.push_back(Instruction) [all...] |
MCWin64EH.cpp | 168 uint8_t numCodes = CountOfUnwindCodes(info->Instructions); 173 MCWin64EHInstruction &frameInst = info->Instructions[info->LastFrameInst]; 180 // Emit unwind instructions (in reverse order). 181 uint8_t numInst = info->Instructions.size(); 183 MCWin64EHInstruction inst = info->Instructions.back(); 184 info->Instructions.pop_back();
|
/external/llvm/lib/DebugInfo/ |
DWARFDebugFrame.cpp | 38 /// \brief Parse and store a sequence of CFI instructions from our data 47 /// \brief Dump the entry's instructions to the given output stream. 63 /// An entry may contain CFI instructions. An instruction consists of an 75 std::vector<Instruction> Instructions; 78 /// operands to the Instructions vector. 80 Instructions.push_back(Instruction(Opcode)); 84 Instructions.push_back(Instruction(Opcode)); 85 Instructions.back().Ops.push_back(Operand1); 89 Instructions.push_back(Instruction(Opcode)); 90 Instructions.back().Ops.push_back(Operand1) [all...] |
/external/mdnsresponder/mDNSShared/ |
dnsextd.conf | 3 // Instructions for /etc/dnsextd.conf (this file) 14 // Instructions for /etc/named.conf
|
/frameworks/compile/libbcc/lib/AndroidBitcode/ |
ABCExpandVAArgPass.cpp | 23 #include <llvm/IR/Instructions.h>
|
/external/llvm/include/llvm/MC/ |
MCWin64EH.h | 68 Instructions() {} 79 std::vector<MCWin64EHInstruction> Instructions;
|
/external/oprofile/events/mips/5K/ |
events | 16 event:0x1 counters:0 um:zero minimum:500 name:INSN_FETCHED : Instructions fetched 23 event:0xe counters:0 um:zero minimum:500 name:DUAL_ISSUED_INSNS : Dual issued instructions executed 24 event:0xf counters:0 um:zero minimum:500 name:INSNS_EXECED : Instructions executed 29 event:0x1 counters:1 um:zero minimum:500 name:INSNS_EXECED : Instructions executed 30 event:0x5 counters:1 um:zero minimum:500 name:FP_INSNS_EXECED : Floating-point instructions executed 36 event:0xf counters:1 um:zero minimum:500 name:COP2_INSNS_EXECED : COP2 instructions executed
|
/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===// 115 SmallVectorImpl<MCInst> &Instructions); 117 SmallVectorImpl<MCInst> &Instructions); 119 SmallVectorImpl<MCInst> &Instructions); 121 SmallVectorImpl<MCInst> &Instructions); 406 SmallVectorImpl<MCInst> &Instructions){ 409 return expandLoadImm(Inst, IDLoc, Instructions); 411 return expandLoadAddressImm(Inst,IDLoc,Instructions); 413 return expandLoadAddressReg(Inst,IDLoc,Instructions); 418 SmallVectorImpl<MCInst> &Instructions){ [all...] |
/external/oprofile/events/mips/r10000/ |
events | 7 event:0x01 counters:0 um:zero minimum:500 name:INSTRUCTIONS_ISSUED : Instructions issued 8 event:0x01 counters:1 um:zero minimum:500 name:INSTRUCTIONS_GRADUATED : Instructions graduated 16 event:0x05 counters:1 um:zero minimum:500 name:FP_INSTRUCTON_GRADUATED : Floating-point instructions graduated 35 event:0x0f counters:0 um:zero minimum:500 name:INSTRUCTION_GRADUATED : Instructions graduated
|
/external/llvm/lib/IR/ |
Android.mk | 22 Instructions.cpp \
|
/external/oprofile/events/mips/vr5432/ |
events | 5 event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : (Instructions executed)/2 and truncated
|
/external/oprofile/events/mips/vr5500/ |
events | 7 event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : Instructions executed
|
/external/skia/src/sfnt/ |
SkOTTable_glyf.h | 77 struct Instructions { 205 struct Instructions {
|
/external/oprofile/events/i386/westmere/ |
events | 16 event:0x0b counters:0,1,2,3 um:mem_inst_retired minimum:2000000 name:MEM_INST_RETIRED : Memory instructions retired above 0 clocks (Precise Event) 19 event:0x0f counters:0,1,2,3 um:mem_uncore_retired minimum:40000 name:MEM_UNCORE_RETIRED : Load instructions retired that HIT modified data in sibling core (Precise Event) 24 event:0x17 counters:0,1,2,3 um:x01 minimum:2000000 name:INST_QUEUE_WRITES : Instructions written to instruction queue. 25 event:0x18 counters:0,1,2,3 um:x01 minimum:2000000 name:INST_DECODED : Instructions that must be decoded by decoder 0 26 event:0x19 counters:0,1,2,3 um:x01 minimum:2000000 name:TWO_UOP_INSTS_DECODED : Two Uop instructions decoded 27 event:0x1e counters:0,1,2,3 um:x01 minimum:2000000 name:INST_QUEUE_WRITE_CYCLES : Cycles instructions are written to the instruction queue 48 event:0x88 counters:0,1,2,3 um:br_inst_exec minimum:200000 name:BR_INST_EXEC : Branch instructions executed 51 event:0xa6 counters:0,1,2,3 um:x01 minimum:2000000 name:MACRO_INSTS : Macro-fused instructions decoded 63 event:0xc0 counters:0,1,2,3 um:inst_retired minimum:2000000 name:INST_RETIRED : Instructions retired (Programmable counter and Precise Event) 66 event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:200000 name:BR_INST_RETIRED : Retired branch instructions (Precise Event [all...] |
/frameworks/compile/libbcc/lib/AndroidBitcode/X86/ |
X86ABCExpandVAArg.cpp | 20 #include <llvm/IR/Instructions.h>
|
/external/llvm/tools/bugpoint/ |
CrashDebugger.cpp | 21 #include "llvm/IR/Instructions.h" 357 /// non-terminator instructions and replacing them with undef. 388 SmallPtrSet<Instruction*, 64> Instructions; 391 Instructions.insert(cast<Instruction>(VMap[Insts[i]])); 394 outs() << "Checking for crash with only " << Instructions.size(); 395 if (Instructions.size() == 1) 398 outs() << " instructions: "; 404 if (!Instructions.count(Inst) && !isa<TerminatorInst>(Inst) && 424 for (SmallPtrSet<Instruction*, 64>::const_iterator I = Instructions.begin(), 425 E = Instructions.end(); I != E; ++I [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineBasicBlock.h | 10 // Collect the sequence of machine instructions for a basic block. 63 typedef ilist<MachineInstr> Instructions; 64 Instructions Insts; 202 typedef Instructions::iterator instr_iterator; 203 typedef Instructions::const_iterator const_instr_iterator; 341 /// updateTerminator - Update the terminator instructions in block to account 448 /// alone can't be used to prepend or append instructions to bundles. See 452 /// Insert a range of instructions into the instruction list before I. 474 /// If the instruction is part of a bundle, the other instructions in the 480 /// If the instruction is part of a bundle, the other instructions in th [all...] |
/frameworks/compile/libbcc/lib/AndroidBitcode/ARM/ |
ARMABCExpandVAArg.cpp | 20 #include <llvm/IR/Instructions.h>
|
/frameworks/compile/libbcc/lib/AndroidBitcode/Mips/ |
MipsABCExpandVAArg.cpp | 20 #include <llvm/IR/Instructions.h>
|
/frameworks/compile/libbcc/lib/Renderscript/ |
RSEmbedInfo.cpp | 25 #include <llvm/IR/Instructions.h>
|
/external/oprofile/events/mips/20K/ |
events | 7 event:0x1 counters:0 um:zero minimum:500 name:INSN_ISSUED : Dispatched/issued instructions 9 event:0x3 counters:0 um:zero minimum:500 name:FP_INSNS_COMPLETED : Instructions completed in FPU datapath (computational event:instructions only) 18 event:0xc counters:0 um:zero minimum:500 name:RPS_MISSPREDICTS : JR instructions that mispredicted using the Return Prediction Stack (RPS)
|
/external/webkit/Source/WebCore/manual-tests/inspector-wrappers/ |
inspector-wrappers-test-utils.js | 27 function instructions(params) { function 32 "<p>Instructions:</p>" +
|