| /external/v8/src/mips/ |
| constants-mips.cc | 318 case LUI:
|
| assembler-mips-inl.h | 129 // For an instruction like LUI/ORI where the target bits are mixed into the
278 bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
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| assembler-mips.cc | 182 // specially coded on MIPS means that it is a lui/ori instruction, and that is
567 return opcode == LUI;
1449 void Assembler::lui(Register rd, int32_t j) { function in class:v8::Assembler
[all...] |
| constants-mips.h | 270 LUI = ((1 << 3) + 7) << kOpcodeShift,
|
| simulator-mips.cc | [all...] |
| macro-assembler-mips.cc | 783 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
785 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
794 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
[all...] |
| /external/llvm/lib/IR/ |
| PassManager.cpp | 545 for (DenseMap<Pass *, Pass *>::iterator LUI = LastUser.begin(),
546 LUE = LastUser.end(); LUI != LUE; ++LUI) {
547 if (LUI->second == AP)
550 LastUser[LUI->first] = P;
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 385 mMips->LUI(tmpReg, (amode.value >> 16));
499 mMips->LUI(Rd, (amode.value >> 16));
531 mMips->LUI(Rd, (amode.value >> 16));
[all...] |
| MIPSAssembler.h | 342 void LUI(int Rt, int16_t offset);
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| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | 243 LUI
244 lui $t0, 0xffff :: rd 0xffff0000 rs 0x0000ffff
245 lui $t0, 0xff00 :: rd 0xff000000 rs 0x0000ff00
246 lui $t0, 0xff :: rd 0x00ff0000 rs 0x000000ff
247 lui $t0, 0x0 :: rd 0x00000000 rs 0x00000000
248 lui $t0, 0x5 :: rd 0x00050000 rs 0x00000005
249 lui $t0, 0x387 :: rd 0x03870000 rs 0x00000387
[all...] |
