| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 160 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
169 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
171 SDValue &Lo, SDValue &Hi);
295 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
297 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
299 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
300 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
305 SDValue &Lo, SDValue &Hi);
306 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
307 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi)
[all...] |
| LegalizeTypesGeneric.cpp | 14 // computation in two identical registers of a smaller type. The Lo/Hi part
30 // These routines assume that the Lo/Hi part is stored first in memory on
31 // little/big-endian machines, followed by the Hi/Lo part. This means that
32 // they cannot be used as is on vectors, for which Lo is always stored first.
34 SDValue &Lo, SDValue &Hi) {
36 GetExpandedOp(Op, Lo, Hi);
39 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
53 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
[all...] |
| LegalizeFloatTypes.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 237 SDValue Lo, Hi;
238 GetSplitVector(N->getOperand(0), Lo, Hi);
239 Lo = BitConvertToInteger(Lo);
243 std::swap(Lo, Hi);
248 JoinIntegers(Lo, Hi));
[all...] |
| LegalizeVectorTypes.cpp | 479 SDValue Lo, Hi;
495 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
497 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
498 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
499 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
500 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
501 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
502 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
503 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
504 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break
[all...] |
| LegalizeTypes.cpp | 765 void DAGTypeLegalizer::GetExpandedInteger(SDValue Op, SDValue &Lo,
771 Lo = Entry.first;
775 void DAGTypeLegalizer::SetExpandedInteger(SDValue Op, SDValue Lo,
777 assert(Lo.getValueType() ==
779 Hi.getValueType() == Lo.getValueType() &&
781 // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
782 AnalyzeNewValue(Lo);
788 Entry.first = Lo;
792 void DAGTypeLegalizer::GetExpandedFloat(SDValue Op, SDValue &Lo,
798 Lo = Entry.first
[all...] |
| LegalizeVectorOps.cpp | 450 SDValue Lo, Hi, ShAmt;
454 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt);
455 Lo = DAG.getNode(ISD::AND, dl, WideVT, Lo, SrcEltBitMask);
471 Lo = DAG.getNode(ISD::OR, dl, WideVT, Lo, Hi);
476 Lo = DAG.getAnyExtOrTrunc(Lo, dl, DstEltVT);
479 Lo = DAG.getZExtOrTrunc(Lo, dl, DstEltVT)
[all...] |
| /external/llvm/include/llvm/Support/ |
| SwapByteOrder.h | 34 uint16_t Lo = value >> 8;
35 return Hi | Lo;
66 uint32_t Lo = SwapByteOrder_32(uint32_t(value >> 32));
67 return (Hi << 32) | Lo;
|
| GCOV.h | 138 uint64_t Lo = readInt();
140 uint64_t Result = Lo | (Hi << 32);
|
| /external/llvm/include/llvm/IR/ |
| MDBuilder.h | 81 /// \brief Return metadata describing the range [Lo, Hi).
82 MDNode *createRange(const APInt &Lo, const APInt &Hi) {
83 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!");
85 if (Hi == Lo)
88 // Return the range [Lo, Hi).
89 Type *Ty = IntegerType::get(Context, Lo.getBitWidth());
90 Value *Range[2] = { ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi) };
|
| /external/llvm/lib/Target/Mips/ |
| MipsJITInfo.cpp | 172 // addiu $t9, $t9, %lo(NewVal)
179 int Lo = (int)(NewVal & 0xffff);
182 *(intptr_t *)(StubAddr + 4) = 9 << 26 | 25 << 21 | 25 << 16 | Lo;
219 int Lo = (int)(EmittedAddr & 0xffff);
222 // addiu t9, t9, %lo(EmittedAddr)
227 JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
232 JCE.emitWordBE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
|
| Mips16ISelDAGToDAG.cpp | 42 SDNode *Lo = 0, *Hi = 0;
49 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
50 InFlag = SDValue(Lo, 1);
56 return std::make_pair(Lo, Hi);
200 // addiu $2, $2, %lo($CPI1_0)
204 // lwc1 $f0, %lo($CPI1_0)($2)
205 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
|
| MipsSEISelDAGToDAG.cpp | 105 // daddiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname)))
120 // addiu $globalbasereg, $v0, %lo(__gnu_local_gp)
134 // addiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname)))
150 // 1. addiu $2, $2, %lo(_gp_disp)
184 SDNode *Lo = 0, *Hi = 0;
191 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
192 InFlag = SDValue(Lo, 1);
198 return std::make_pair(Lo, Hi);
269 // addiu $2, $2, %lo($CPI1_0)
273 // lwc1 $f0, %lo($CPI1_0)($2
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 98 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) {
103 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) {
124 if (Addr.getOperand(0).getOpcode() == SPISD::Lo ||
125 Addr.getOperand(1).getOpcode() == SPISD::Lo)
|
| SparcISelLowering.h | 32 Hi, Lo, // Hi/Lo operations, typically on a global address.
|
| SparcISelLowering.cpp | 476 SDValue Lo = DAG.getLoad(MVT::i32, dl, Store, StackPtr,
484 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Lo));
491 MemOpChains.push_back(DAG.getStore(Chain, dl, Lo, PtrOff,
507 MemOpChains.push_back(DAG.getStore(Chain, dl, Lo, PtrOff,
705 // Custom legalize GlobalAddress nodes into LO/HI parts.
[all...] |
| /frameworks/av/libvideoeditor/vss/3gpwriter/inc/ |
| M4MP4W_Utils.h | 96 * Put Hi and Lo u16 part in a u32 variable
100 M4OSA_Void M4MP4W_put32_Lo(M4OSA_UInt32* tab, M4OSA_UInt16 Lo);
|
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| AsmPrinter.h | 340 /// EmitLabelDifference - Emit something like ".long Hi-Lo" where the size
341 /// in bytes of the directive is specified by Size and Hi/Lo specify the
343 void EmitLabelDifference(const MCSymbol *Hi, const MCSymbol *Lo,
346 /// EmitLabelOffsetDifference - Emit something like ".long Hi+Offset-Lo"
347 /// where the size in bytes of the directive is specified by Size and Hi/Lo
350 const MCSymbol *Lo, unsigned Size) const;
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DIE.h | 303 DIEDelta(const MCSymbol *Hi, const MCSymbol *Lo)
304 : DIEValue(isDelta), LabelHi(Hi), LabelLo(Lo) {}
|
| /frameworks/av/libvideoeditor/vss/3gpwriter/src/ |
| M4MP4W_Utils.c | 289 M4OSA_Void M4MP4W_put32_Lo(M4OSA_UInt32* tab, M4OSA_UInt16 Lo)
293 *tab |= Lo;
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 574 SDValue Lo(Hi.getNode(), 1);
575 SDValue Ops[] = { Lo, Hi };
591 SDValue Lo(Hi.getNode(), 1);
592 SDValue Ops[] = { Lo, Hi };
688 SDValue Lo(Hi.getNode(), 1);
689 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
696 SDValue Lo(Hi.getNode(), 1);
697 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
707 SDValue Lo(Hi.getNode(), 1);
712 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi)
[all...] |
| /external/skia/legacy/src/core/ |
| SkMath.cpp | 102 uint32_t lo = C + (B << 16); local
103 int32_t hi = A + (B >> 16) + (lo < C);
106 hi = -hi - Sk32ToBool(lo);
107 lo = 0 - lo;
112 SkASSERT(((int32_t)lo >> 31) == hi);
114 return lo;
122 // we want (hi << (32 - shift)) | (lo >> shift) but rounded
123 int roundBit = (lo >> (shift - 1)) & 1;
124 return ((hi << (32 - shift)) | (lo >> shift)) + roundBit
[all...] |
| /external/skia/src/core/ |
| SkMath.cpp | 101 uint32_t lo = C + (B << 16); local
102 int32_t hi = A + (B >> 16) + (lo < C);
105 hi = -hi - Sk32ToBool(lo);
106 lo = 0 - lo;
111 SkASSERT(((int32_t)lo >> 31) == hi);
113 return lo;
121 // we want (hi << (32 - shift)) | (lo >> shift) but rounded
122 int roundBit = (lo >> (shift - 1)) & 1;
123 return ((hi << (32 - shift)) | (lo >> shift)) + roundBit
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 43 Hi, Lo, // Hi/Lo operations, typically on a global address.
|
