/external/dropbear/libtomcrypt/src/encauth/gcm/ |
gcm_mult_h.c | 30 asm("movdqa (%0),%%xmm0"::"r"(&gcm->PC[0][I[0]][0])); 32 asm("pxor (%0),%%xmm0"::"r"(&gcm->PC[x][I[x]][0])); 36 XMEMCPY(T, &gcm->PC[0][I[0]][0], 16); 40 *((LTC_FAST_TYPE *)(T + y)) ^= *((LTC_FAST_TYPE *)(&gcm->PC[x][I[x]][y])); 44 T[y] ^= gcm->PC[x][I[x]][y];
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gcm_init.c | 82 gcm_gf_mult(gcm->H, B, &gcm->PC[0][y][0]); 89 t = gcm->PC[x-1][y][15]; 91 gcm->PC[x][y][z] = gcm->PC[x-1][y][z-1]; 93 gcm->PC[x][y][0] = gcm_shift_table[t<<1]; 94 gcm->PC[x][y][1] ^= gcm_shift_table[(t<<1)+1];
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/external/dropbear/libtomcrypt/src/modes/lrw/ |
lrw_start.c | 78 gcm_gf_mult(tweak, B, &lrw->PC[0][y][0]); 85 t = lrw->PC[x-1][y][15]; 87 lrw->PC[x][y][z] = lrw->PC[x-1][y][z-1]; 89 lrw->PC[x][y][0] = gcm_shift_table[t<<1]; 90 lrw->PC[x][y][1] ^= gcm_shift_table[(t<<1)+1];
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lrw_setiv.c | 55 XMEMCPY(T, &lrw->PC[0][IV[0]][0], 16); 59 *((LTC_FAST_TYPE *)(T + y)) ^= *((LTC_FAST_TYPE *)(&lrw->PC[x][IV[x]][y])); 63 T[y] ^= lrw->PC[x][IV[x]][y];
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lrw_process.c | 63 *((LTC_FAST_TYPE *)(lrw->pad + y)) ^= *((LTC_FAST_TYPE *)(&lrw->PC[x][lrw->IV[x]][y])) ^ *((LTC_FAST_TYPE *)(&lrw->PC[x][(lrw->IV[x]-1)&255][y])); 67 lrw->pad[y] ^= lrw->PC[x][lrw->IV[x]][y] ^ lrw->PC[x][(lrw->IV[x]-1)&255][y];
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/external/clang/unittests/AST/ |
CommentParser.cpp | 438 ParagraphComment *PC; 441 ::testing::AssertionResult AR = GetChildAt(C, Idx, PC); 447 ::testing::AssertionResult AR = HasChildCount(PC, 1); 453 ::testing::AssertionResult AR = HasTextAt(PC, 0, Text); 622 ParagraphComment *PC; 623 ASSERT_TRUE(GetChildAt(FC, 0, PC)); 625 ASSERT_TRUE(HasChildCount(PC, 2)); 626 ASSERT_TRUE(HasTextWithNewlineAt(PC, 0, " Aaa")); 627 ASSERT_TRUE(HasTextAt(PC, 1, " Bbb")); 665 ParagraphComment *PC; [all...] |
/dalvik/vm/compiler/template/armv5te/ |
TEMPLATE_INTERPRET.S | 6 * translation chain, it will point to the chaining Dalvik PC -3. 9 * r1 - the Dalvik PC to begin interpretation. 11 * [lr, #3] contains Dalvik PC to begin interpretation 25 mov r0, r1 @ set Dalvik PC
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/dalvik/vm/mterp/mips/ |
OP_THROW_VERIFICATION_ERROR.S | 11 EXPORT_PC() # export the PC
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OP_MONITOR_ENTER.S | 10 EXPORT_PC() # export PC so we can grab stack trace
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stub.S | 2 SAVE_PC_TO_SELF() # only need to export PC and FP
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/external/arduino/hardware/arduino/cores/arduino/ |
pins_arduino.c | 70 #define PC 3 163 PC , // PC 7 ** 30 ** D30 164 PC , // PC 6 ** 31 ** D31 165 PC , // PC 5 ** 32 ** D32 166 PC , // PC 4 ** 33 ** D33 167 PC , // PC 3 ** 34 ** D34 [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_THROW_VERIFICATION_ERROR.S | 10 EXPORT_PC() @ export the PC
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/bionic/libc/kernel/arch-mips/asm/ |
ptrace.h | 22 #define PC 64
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
ptrace.h | 22 #define PC 64
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/external/quake/quake/src/QW/ |
qwcl.x11.spec.sh | 26 conceived" - PC GAMER 28 "The most important PC game ever" - PC ZONE
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glqwcl.spec.sh | 26 conceived" - PC GAMER 28 "The most important PC game ever" - PC ZONE
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
ptrace.h | 22 #define PC 64
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
ptrace.h | 22 #define PC 64
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/ |
termcap.h | 57 extern NCURSES_EXPORT_VAR(char) PC;
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/ |
termcap.h | 57 extern NCURSES_EXPORT_VAR(char) PC;
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/ |
termcap.h | 57 extern NCURSES_EXPORT_VAR(char) PC;
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/dalvik/vm/mterp/x86/ |
OP_FILL_ARRAY_DATA.S | 4 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
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OP_PACKED_SWITCH.S | 15 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
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OP_MUL_LONG.S | 15 SPILL_TMP2(%esi) # save Dalvik PC 31 UNSPILL_TMP2(%esi) # Restore Dalvik PC
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/external/llvm/include/llvm-c/ |
Disassembler.h | 39 * is at the PC parameter. For some instruction sets, there can be more than 50 typedef int (*LLVMOpInfoCallback)(void *DisInfo, uint64_t PC, 64 * including any PC adjustment, is passed in to the call back in the Value 100 * disassembler for things like adding a comment for a PC plus a constant 105 * instruction is passed indirectly as is the PC of the instruction in 123 /* The input reference is from a PC relative load instruction. */ 183 * instruction is at the address specified by the PC parameter. If a valid 190 uint64_t BytesSize, uint64_t PC,
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