/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | 581 unsigned ShAmt = SA->getZExtValue(); 585 if (ShAmt >= BitWidth) 588 // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a 593 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { 596 int Diff = ShAmt-C1; 610 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), 620 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && 623 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) 627 TLO.DAG.getConstant(ShAmt, ShTy)) [all...] |
LegalizeVectorOps.cpp | 450 SDValue Lo, Hi, ShAmt; 453 ShAmt = DAG.getConstant(BitOffset, TLI.getShiftAmountTy(WideVT)); 454 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt); 463 ShAmt = DAG.getConstant(SrcEltBits - Offset, 465 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); 482 ShAmt = DAG.getConstant(WideBits - SrcEltBits, 484 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt); 485 Lo = DAG.getNode(ISD::SRA, dl, WideVT, Lo, ShAmt);
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SelectionDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineShifts.cpp | 370 Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType()); 372 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); 687 unsigned ShAmt = Op1C->getZExtValue(); 692 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) { 699 ComputeNumSignBits(I.getOperand(0)) > ShAmt) { 726 unsigned ShAmt = Op1C->getZExtValue(); 736 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { 746 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ 766 unsigned ShAmt = Op1C->getZExtValue(); 792 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ [all...] |
InstCombineCompares.cpp | [all...] |
InstCombineCasts.cpp | [all...] |
InstCombineAddSub.cpp | 926 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); 927 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); 928 return BinaryOperator::CreateAShr(NewShl, ShAmt); [all...] |
InstCombineMulDivRem.cpp | 781 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), 783 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); [all...] |
InstCombineAndOrXor.cpp | [all...] |
/external/clang/lib/Lex/ |
PPExpressions.cpp | 595 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); 597 Overflow = ShAmt >= LHS.Val.getBitWidth(); 599 ShAmt = LHS.Val.getBitWidth()-1; 600 Res = LHS.Val << ShAmt; 602 Res = llvm::APSInt(LHS.Val.sshl_ov(ShAmt, Overflow), false); 608 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); 609 if (ShAmt >= LHS.getBitWidth()) 610 Overflow = true, ShAmt = LHS.getBitWidth()-1; 611 Res = LHS.Val >> ShAmt;
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/external/llvm/lib/Transforms/Scalar/ |
ScalarReplAggregates.cpp | [all...] |
SROA.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | 95 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 464 unsigned ShAmt) { 471 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); 590 unsigned ShAmt = Log2_32(RHSC); 592 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, 618 unsigned ShAmt = 0; 628 ShAmt = Sh->getZExtValue(); 629 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) 632 ShAmt = 0 [all...] |
ARMBaseInstrInfo.cpp | [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/IR/ |
ConstantFold.cpp | 255 unsigned ShAmt = Amt->getZExtValue(); 257 if ((ShAmt & 7) != 0) 259 ShAmt >>= 3; 262 if (ByteStart >= CSize-ShAmt) 266 if (ByteStart+ByteSize+ShAmt <= CSize) 267 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); 277 unsigned ShAmt = Amt->getZExtValue(); 279 if ((ShAmt & 7) != 0) 281 ShAmt >>= 3; 284 if (ByteStart+ByteSize <= ShAmt) [all...] |
/external/llvm/lib/Analysis/ |
ValueTracking.cpp | [all...] |
/external/llvm/lib/Support/ |
APInt.cpp | [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
X86ISelLowering.cpp | [all...] |