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  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 1 //===-- XCoreRegisterInfo.cpp - XCore Register Information ----------------===//
10 // This file contains the XCore implementation of the MRegisterInfo class.
15 #include "XCore.h"
41 : XCoreGenRegisterInfo(XCore::LR), TII(tii) {
65 XCore::R4, XCore::R5, XCore::R6, XCore::R7,
66 XCore::R8, XCore::R9, XCore::R10, XCore::LR
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XCoreInstrInfo.cpp 1 //===-- XCoreInstrInfo.cpp - XCore Instruction Information ----------------===//
10 // This file contains the XCore implementation of the TargetInstrInfo class.
15 #include "XCore.h"
29 namespace XCore {
31 // XCore Condition Codes
43 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),
59 if (Opcode == XCore::LDWFI)
81 if (Opcode == XCore::STWFI)
99 return BrOpc == XCore::BRFU_u
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XCoreFrameLowering.cpp 1 //===-- XCoreFrameLowering.cpp - Frame info for XCore Target --------------===//
10 // This file contains XCore frame information that doesn't fit anywhere else
16 #include "XCore.h"
54 int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
69 int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
104 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
125 Opcode = (isU6) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6
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Makefile 1 ##===- lib/Target/XCore/Makefile ---------------------------*- Makefile -*-===##
12 TARGET = XCore
XCoreISelDAGToDAG.cpp 1 //===-- XCoreISelDAGToDAG.cpp - A dag to dag inst selector for XCore ------===//
10 // This file defines an instruction selector for the XCore target.
14 #include "XCore.h"
35 /// XCoreDAGToDAGISel - XCore specific code to select XCore machine
75 return "XCore DAG->DAG Pattern Instruction Selection";
84 /// XCore-specific DAG, ready for instruction scheduling.
165 return CurDAG->getMachineNode(XCore::MKMSK_rus, dl,
173 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
187 return CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, MVT::i32
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XCoreAsmPrinter.cpp 1 //===-- XCoreAsmPrinter.cpp - XCore LLVM assembly writer ------------------===//
11 // of machine-dependent LLVM code to the XAS-format XCore assembly language.
16 #include "XCore.h"
49 static cl::opt<unsigned> MaxThreads("xcore-max-threads", cl::Optional,
66 return "XCore Assembly Printer";
302 case XCore::DBG_VALUE: {
311 case XCore::ADD_2rus:
320 case XCore::BR_JT:
321 case XCore::BR_JT32:
324 if (MI->getOpcode() == XCore::BR_JT
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XCoreISelLowering.cpp 1 //===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===//
14 #define DEBUG_TYPE "xcore-lower"
17 #include "XCore.h"
70 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass);
78 setStackPointerRegisterToSaveRestore(XCore::SP);
86 // XCore does not have the NodeTypes below.
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  /external/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp 1 //===- XCoreDisassembler.cpp - Disassembler for XCore -----------*- C++ -*-===//
11 /// \brief This file is part of the XCore Disassembler.
15 #include "XCore.h"
30 /// \brief A disassembler class for XCore.
212 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo);
276 Inst.setOpcode(XCore::STW_2rus);
279 Inst.setOpcode(XCore::LDW_2rus);
282 Inst.setOpcode(XCore::ADD_3r);
285 Inst.setOpcode(XCore::SUB_3r);
288 Inst.setOpcode(XCore::SHL_3r)
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  /external/llvm/lib/Target/XCore/MCTargetDesc/
XCoreMCTargetDesc.cpp 1 //===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===//
10 // This file provides XCore specific target descriptions.
43 InitXCoreMCRegisterInfo(X, XCore::LR);
59 MachineLocation Src(XCore::SP, 0);
  /external/llvm/
configure     [all...]
  /external/llvm/projects/sample/
configure     [all...]

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