| /dalvik/vm/mterp/x86/ |
| OP_IGET_QUICK.S | 5 movzbl rINSTbl,%ecx # ecx<- BA
6 sarl $$4,%ecx # ecx<- B
7 GET_VREG_R %ecx %ecx # vB (object we're operating on)
9 cmpl $$0,%ecx # is object null?
11 movl (%ecx,%eax,1),%eax
12 FETCH_INST_OPCODE 2 %ecx
16 GOTO_NEXT_R %ecx
[all...] |
| OP_IGET_WIDE_QUICK.S | 5 movzbl rINSTbl,%ecx # ecx<- BA
6 sarl $$4,%ecx # ecx<- B
7 GET_VREG_R %ecx %ecx # vB (object we're operating on)
9 cmpl $$0,%ecx # is object null?
11 leal (%ecx,%eax,1),%eax # eax<- address of 64-bit source
12 movl (%eax),%ecx # ecx<- ls
[all...] |
| OP_IPUT_OBJECT_QUICK.S | 5 movzbl rINSTbl,%ecx # ecx<- BA
6 sarl $$4,%ecx # ecx<- B
7 GET_VREG_R %ecx %ecx # vB (object we're operating on)
11 testl %ecx,%ecx # is object null?
13 movl rINST,(%ecx,%eax,1)
18 shrl $$GC_CARD_SHIFT,%ecx # object head to card numbe
[all...] |
| OP_IPUT_QUICK.S | 5 movzbl rINSTbl,%ecx # ecx<- BA
6 sarl $$4,%ecx # ecx<- B
7 GET_VREG_R %ecx %ecx # vB (object we're operating on)
11 testl %ecx,%ecx # is object null?
13 movl rINST,(%ecx,%eax,1)
14 FETCH_INST_OPCODE 2 %ecx
[all...] |
| OP_IPUT_WIDE_QUICK.S | 5 movzbl rINSTbl,%ecx # ecx<- BA
6 sarl $$4,%ecx # ecx<- B
7 GET_VREG_R %ecx %ecx # vB (object we're operating on)
9 testl %ecx,%ecx # is object null?
11 leal (%ecx,%eax,1),%ecx # ecx<- Address of 64-bit targe
[all...] |
| OP_NOP.S | 2 FETCH_INST_OPCODE 1 %ecx
4 GOTO_NEXT_R %ecx
|
| OP_MOVE_WIDE_16.S | 4 movzwl 4(rPC),%ecx # ecx<- BBBB
6 GET_VREG_WORD rINST %ecx 0 # rINSTw_WORD<- v[BBBB+0]
7 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[BBBB+1]
9 SET_VREG_WORD %ecx %eax 1 # v[AAAA+1]<- ecx
10 FETCH_INST_OPCODE 3 %ecx
12 GOTO_NEXT_R %ecx
[all...] |
| OP_MOVE_WIDE_FROM16.S | 4 movzwl 2(rPC),%ecx # ecx<- BBBB
6 GET_VREG_WORD rINST %ecx 0 # rINST<- v[BBBB+0]
7 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[BBBB+1]
9 SET_VREG_WORD %ecx %eax 1 # v[AAAA+1]<- eax
10 FETCH_INST_OPCODE 2 %ecx
12 GOTO_NEXT_R %ecx
|
| OP_CONST_WIDE.S | 4 movzbl rINSTbl,%ecx # ecx<- AA
6 leal (rFP,%ecx,4),%ecx # dst addr
7 movl rINST,4(%ecx)
8 movl %eax,(%ecx)
9 FETCH_INST_OPCODE 5 %ecx
11 GOTO_NEXT_R %ecx
|
| OP_MOVE_RESULT_WIDE.S | 3 movl rSELF,%ecx
4 movl offThread_retval(%ecx),%eax
5 movl 4+offThread_retval(%ecx),%ecx
7 SET_VREG_WORD %ecx rINST 1 # v[AA+1] <- ecx
8 FETCH_INST_OPCODE 1 %ecx
10 GOTO_NEXT_R %ecx
|
| OP_CONST_16.S | 3 movswl 2(rPC),%ecx # ecx<- ssssBBBB
6 SET_VREG %ecx rINST # vAA<- ssssBBBB
|
| OP_NEG_LONG.S | 3 movzbl rINSTbl,%ecx # ecx<- BA
4 sarl $$4,%ecx # ecx<- B
6 GET_VREG_WORD %eax %ecx 0 # eax<- v[B+0]
7 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[B+1]
9 adcl $$0,%ecx
10 negl %ecx
[all...] |
| unopWide.S | 4 * Operand in %ecx:%eax
9 movzbl rINSTbl,%ecx # ecx<- BA
10 sarl $$4,%ecx # ecx<- B
12 GET_VREG_WORD %eax %ecx 0 # eax<- v[B+0]
13 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[B+1]
15 $instr2 # ex: adcl $$0,%ecx
[all...] |
| OP_MOVE_16.S | 4 movzwl 4(rPC),%ecx # ecx<- BBBB
6 GET_VREG_R rINST %ecx
7 FETCH_INST_OPCODE 3 %ecx
10 GOTO_NEXT_R %ecx
|
| binopLit8.S | 4 * that specifies an instruction that performs "result = eax op ecx".
14 movsbl 3(rPC),%ecx # ecx<- ssssssCC
16 $instr # ex: addl %ecx,%eax
18 FETCH_INST_OPCODE 2 %ecx
20 GOTO_NEXT_R %ecx
|
| OP_NOT_LONG.S | 3 movzbl rINSTbl,%ecx # ecx<- BA
4 sarl $$4,%ecx # ecx<- B
6 GET_VREG_WORD %eax %ecx 0 # eax<- v[B+0]
7 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[B+1]
9 notl %ecx
12 SET_VREG_WORD %ecx rINST 1 # v[A+1]<- ec
[all...] |
| OP_MUL_INT_2ADDR.S | 3 movzx rINSTbl,%ecx # ecx<- A+
6 andb $$0xf,%cl # ecx<- A
8 imull (rFP,%ecx,4),%eax # trashes rIBASE/edx
10 SET_VREG %eax %ecx
11 FETCH_INST_OPCODE 1 %ecx
13 GOTO_NEXT_R %ecx
|
| binop1.S | 1 %default {"result":"%eax","tmp":"%ecx"}
4 * registers (op0 in eax, op1 in ecx).
8 movzbl 3(rPC),%ecx # ecx<- CC
10 GET_VREG_R %ecx %ecx # eax<- vBB
11 $instr # ex: addl %ecx,%eax
13 FETCH_INST_OPCODE 2 %ecx
15 GOTO_NEXT_R %ecx
|
| shop2addr.S | 6 movzx rINSTbl,%ecx # eax<- BA
7 sarl $$4,%ecx # ecx<- B
8 GET_VREG_R %ecx %ecx # eax<- vBB
12 FETCH_INST_OPCODE 1 %ecx
15 GOTO_NEXT_R %ecx
|
| OP_CMP_LONG.S | 11 movzbl 2(rPC),%ecx # ecx<- BB
14 GET_VREG_WORD %eax %ecx,1 # eax<- v[BB+1]
15 GET_VREG_WORD %ecx %ecx 0 # ecx<- v[BB+0]
19 sub (rFP,rIBASE,4),%ecx
22 SET_VREG %ecx rINST
23 FETCH_INST_OPCODE 2 %ecx
26 GOTO_NEXT_R %ecx
[all...] |
| binopWide2addr.S | 5 movzbl rINSTbl,%ecx # ecx<- BA
6 sarl $$4,%ecx # ecx<- B
7 GET_VREG_WORD %eax %ecx 0 # eax<- v[B+0]
8 GET_VREG_WORD %ecx %ecx 1 # eax<- v[B+1]
11 $instr2 # example: adcl %ecx,4(rFP,rINST,4)
12 FETCH_INST_OPCODE 1 %ecx
14 GOTO_NEXT_R %ecx
[all...] |
| OP_SGET.S | 11 movl rSELF,%ecx
13 movl offThread_methodClassDex(%ecx),%ecx # ecx<- DvmDex
14 movl offDvmDex_pResFields(%ecx),%ecx # ecx<- dvmDex->pResFields
16 movl %ecx, TMP_SPILL1(%ebp)
17 lea (%ecx,%eax,4),%ecx
[all...] |
| OP_SPUT.S | 11 movl rSELF,%ecx
13 movl offThread_methodClassDex(%ecx),%ecx # ecx<- DvmDex
14 movl offDvmDex_pResFields(%ecx),%ecx # ecx<- dvmDex->pResFields
16 movl %ecx, TMP_SPILL1(%ebp)
17 lea (%ecx,%eax,4),%ecx
[all...] |
| /external/llvm/test/MC/X86/ |
| intel-syntax.s | 62 // CHECK: movl _fnan(,%ecx,4), %ecx
63 mov ECX, DWORD PTR [4*ECX + _fnan]
70 // CHECK: movl %ecx, (%eax)
71 mov [eax], ecx
72 // CHECK: movl %ecx, (,%ebx,4)
73 mov [4*ebx], ecx
74 // CHECK: movl %ecx, (,%ebx,4)
75 mov [ebx*4], ecx
[all...] |
| /external/grub/stage2/ |
| setjmp.S | 59 movl 4(%esp), %ecx /* fetch buffer */
60 movl %ebx, 0(%ecx)
61 movl %esi, 4(%ecx)
62 movl %edi, 8(%ecx)
63 movl %ebp, 12(%ecx) /* save frame pointer of caller */
65 movl %esp, 16(%ecx) /* save stack pointer of caller */
66 movl %edx, 20(%ecx) /* save pc of caller */
72 movl 4(%esp), %ecx /* fetch buffer */
73 movl 0(%ecx), %ebx
74 movl 4(%ecx), %es
[all...] |
