| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 29 LDR r8,[r0],r1
32 STR r8,[r2],r3
39 LDR r8,[r0],r1
43 LSR r8,r8,#8
44 ORR r8,r8,r9,LSL #24
47 STR r8,[r2],r3
49 LDR r8,[r0],r1
53 LSR r8,r8,#
[all...] |
| armVCM4P10_DecodeCoeffsToPair_s.S | 24 LDRB r8,[r10,#1]
28 ORR r9,r9,r8,LSL #8
30 LSLS r8,r11,r12
32 AND r7,r7,r8,LSR #27
36 LDRB r8,[r10],#1
41 ORRCS r11,r8,r11,LSL #8
42 LSRS r8,r7,#1
44 LSLS r8,r11,r12
46 ADD r7,r7,r8,LSR #29
51 BIC r7,r8,#0xf00
[all...] |
| omxVCM4P10_PredictIntra_16x16_s.S | 45 ADD r8,r3,r5
48 VST1.8 {d0,d1},[r8],r10
50 VST1.8 {d0,d1},[r8],r10
52 VST1.8 {d0,d1},[r8],r10
54 VST1.8 {d0,d1},[r8],r10
56 VST1.8 {d0,d1},[r8],r10
58 VST1.8 {d0,d1},[r8],r10
60 VST1.8 {d0,d1},[r8],r10
62 VST1.8 {d0,d1},[r8]
67 ADD r8,r0,r
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| convolve_opt.s | 45 MUL r8, r9, r10
54 MLA r8, r9, r10, r8
55 MLA r8, r12, r14, r8
60 MLA r8, r9, r10, r8
62 MLA r8, r12, r14, r8
68 ADD r5, r11, r8, LSL #
[all...] |
| /hardware/samsung_slsi/exynos5/libswconverter/ |
| csc_tiled_to_linear_uv_neon.s | 62 @r8 src_offset
80 mul r8, r11, r5 @ src_offset = tiled_width * i
82 add r8, r1, r8 @ src_offset = y_src + src_offset
84 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
85 vld1.8 {q0, q1}, [r8]!
87 vld1.8 {q2, q3}, [r8]!
89 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
90 vld1.8 {q4, q5}, [r8]!
92 vld1.8 {q6, q7}, [r8]!
[all...] |
| csc_tiled_to_linear_y_neon.s | 63 @r8 src_offset
81 mul r8, r11, r5 @ src_offset = tiled_width * i
83 add r8, r1, r8 @ src_offset = y_src + src_offset
85 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
86 vld1.8 {q0, q1}, [r8]!
87 vld1.8 {q2, q3}, [r8]!
88 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
89 vld1.8 {q4, q5}, [r8]!
90 vld1.8 {q6, q7}, [r8]!
[all...] |
| csc_tiled_to_linear_uv_deinterleave_neon.s | 65 @r8 src_offset
83 mul r8, r11, r5 @ src_offset = tiled_width * i
85 add r8, r2, r8 @ src_offset = uv_src + src_offset
90 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
91 vld2.8 {q0, q1}, [r8]!
93 vld2.8 {q2, q3}, [r8]!
95 pld [r8, #(CACHE_LINE_SIZE*PRE_LOAD_OFFSET)]
96 vld2.8 {q4, q5}, [r8]!
98 vld2.8 {q6, q7}, [r8]!
[all...] |
| /external/openssl/crypto/bn/asm/ |
| ppc.pl | 231 #.set r8,8
275 # Freely use registers r5,r6,r7,r8,r9,r10,r11 as follows:
278 # r7,r8 are the results of the 32x32 giving 64 bit multiply.
298 $UMULH r8,r5,r6
300 addc r7,r7,r7 # compute (r7,r8)=2*(r7,r8)
301 adde r8,r8,r8
306 addze r11,r8 # r8 added to r11 which is 0
[all...] |
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| band_nrg_v5.s | 54 smull r6, r8, r6, r6
60 qadd r14, r14, r8
61 smull r6, r8, r6, r6
65 qadd r14, r14, r8
113 ldr r8, [r0, +r10, lsl #2]
115 mov r8, r8, asr #1
120 add r5, r8, r9
122 sub r8, r8, r
[all...] |
| CalcWindowEnergy_v5.s | 42 mov r8, #0 @ w=0
50 str r8, [r13, #4]
61 smull r0, r8, r12, r11 @ accu2 = fixmul( Coeff0, states1 );
64 mov r8, r8, lsl #1
67 sub r8, r0, r8 @ out = accu3 - accu2;
70 mov r11, r8 @ states1 = out;
73 mov r8, r8, asr #1
[all...] |
| AutoCorrelation_v5.s | 39 mov r8, #0
72 add r8, r8, #6
75 cmp r8, r12
84 add r8, r8, #1
85 cmp r8, r4
94 mov r8, #1
107 addlt r6, r5, r8, lsl #1
110 add r6, r5, r8, lsl #
[all...] |
| PrePostMDCT_v5.s | 37 ldr r8, [r2], #4
43 smull r14, r11, r4, r8 @ MULHIGH(tr1, cosa)
44 smull r10, r12, r7, r8 @ MULHIGH(ti1, cosa)
46 smull r14, r8, r7, r9 @ MULHIGH(ti1, sina)
49 add r11, r11, r8 @ MULHIGH(cosa, tr1) + MULHIGH(sina, ti1)@
52 ldr r8, [r2], #4
55 smull r14, r4, r6, r8 @ MULHIGH(tr2, cosa)
56 smull r10, r12, r5, r8 @ MULHIGH(ti2, cosa)
58 smull r14, r8, r5, r9 @ MULHIGH(ti2, sina)
61 add r8, r8, r
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| residu_asm_neon.s | 43 MOV r8, r9
44 VLD1.S16 D5, [r8]! @get x[i], x[i+1], x[i+2], x[i+3]
47 SUB r8, r9, #2 @get the x[i-1] address
48 VLD1.S16 D5, [r8]!
51 SUB r8, r9, #4 @load the x[i-2] address
52 VLD1.S16 D5, [r8]!
55 SUB r8, r9, #6 @load the x[i-3] address
56 VLD1.S16 D5, [r8]!
59 SUB r8, r9, #8 @load the x[i-4] address
60 VLD1.S16 D5, [r8]!
[all...] |
| convolve_neon.s | 39 @MOV r8, #0 @ s = 0
47 MUL r8, r9, r10
64 ADD r5, r5, r8
71 @MOV r8, #0
80 MUL r8, r9, r10
82 MLA r8, r12, r14, r8
100 ADD r8, r8, r5
101 ADD r8, r11, r8, LSL #
[all...] |
| /system/core/libpixelflinger/ |
| col32cb16blend.S | 55 ldrh r8, [r0] // load dest pixel
57 mov r6, r8, lsr #11 // extract dest red
58 and r7, r9, r8, lsr #5 // extract dest green
59 and r8, r8, #0x1f // extract dest blue
63 smlabb r8, r8, r5, r4 // dest blue * alpha + src blue
69 orr r6, r8, lsr #8 // shift blue into 565
|
| rotate90CW_4x4_16v6.S | 36 stmfd sp!, {r4,r5, r6,r7, r8,r9, r10,r11, lr}
43 ldrd r8, r9, [r1]
45 pkhbt r10, r8, r6, lsl #16
49 pkhtb r10, r6, r8, asr #16
62 ldmfd sp!, {r4,r5, r6,r7, r8,r9, r10,r11, pc}
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| dequant_idct_v6.asm | 68 smulwb r8, r4, r6
71 pkhbt r8, r8, r10, lsl #16
81 usub16 r7, r8, r7
84 usub16 r8, r11, r14
87 uadd16 r6, r8, r7
88 usub16 r7, r8, r7
101 ldr r8, [r0], #4
105 smulwt lr, r3, r8
106 smulwt r10, r4, r8
[all...] |
| loopfilter_v6.asm | 92 uqsub8 r8, r10, r11 ; p2 - p1
96 orr r8, r8, r10 ; abs (p2-p1)
98 uqsub8 r8, r8, r2 ; compare to limit
100 orr lr, lr, r8
106 uqsub8 r8, r6, r3 ; compare to thresh -- save r8 for later
159 orr r10, r6, r8 ; calculate vp8_hevmask
167 ldr r8, [src], pstep ; p
[all...] |
| /frameworks/av/media/libstagefright/codecs/m4v_h263/dec/src/ |
| idct.cpp | 22 This file contains the functions that transform an 8r8 image block from
44 coefficients of type int for an 8r8 image block;
57 blk points to the found IDCT values for an 8r8 image block.
68 This function transforms an 8r8 image block from dequantized DCT coefficients
82 1. Find horizontal 1-D IDCT values for each row from 8r8 dequantized DCT
131 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; /* butterfly nodes */ local
182 r8 = W7 * (r4 + r5);
183 r4 = (r8 + (W1 - W7) * r4);
186 r5 = (r8 - (W1 + W7) * r5);
187 r8 = W3 * (r6 + r7)
353 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; \/* butterfly nodes *\/ local
[all...] |
| /external/valgrind/main/none/tests/x86/ |
| incdec_alt.c | 7 int r1,r2,r3,r4,r5,r6,r7,r8,a1,a2; variable
49 "\tpopl " VG_SYM(r8) "\n"
58 r1=r2=r3=r4=r5=r6=r7=r8=0;
67 printf("0x%08x\n",r8);
|
| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_STRING_INDEXOF.S | 19 ldr r8, [r0, #STRING_FIELDOFF_COUNT]
28 * r8: string length
41 cmp r2, r8
42 movgt r2, r8
49 sub r8, r2
55 * r8: iteration count
60 subs r8, #4
76 subs r8, #4
80 adds r8, #4
87 subs r8, #
[all...] |
| /frameworks/native/opengl/libagl/ |
| iterators.S | 51 stmfd sp!, {r4, r5, r6, r7, r8, lr}
63 smull r8, lr, r4, r5
67 smlal r8, lr, r3, r5
74 str r8, [r1, #8]
77 umull r8, r0, r4, r8
80 adds r6, r6, r8
88 ldmfd sp!, {r4, r5, r6, r7, r8, pc}
|
| /external/aac/libFDK/src/arm/ |
| dct_arm.cpp | 109 r8 val_tw
117 LDR r8, [r1], #4 // val_tw = *twiddle++; local
121 SMULWT r9, r5, r8 // accuX = accu2*val_tw.l
122 SMULWB r5, r5, r8 // accu2 = accu2*val_tw.h
124 SMLAWT r5, r4, r8, r5 // accu2 = accu2*val_tw.h + accu1*val_tw.l local
125 SMLAWB r4, r4, r8, r9 // accu1 = accu1*val_tw.h - accu2*val_tw.l local
127 LDR r8, [r1], #4 // val_tw = *twiddle++; local
131 SMULWB r9, r7, r8 // accuX = accu4*val_tw.h
132 SMULWT r7, r7, r8 // accu4 = accu4*val_tw.l
134 SMLAWB r7, r6, r8, r7 // accu4 = accu4*val_tw.l+accu3*val_tw. local
135 SMLAWT r6, r6, r8, r9 \/\/ accu3 = accu3*val_tw.l-accu4*val_tw.h local
150 SMLAWT r5, r4, r8, r5 \/\/ accu2 = accu2*val_tw.h + accu1*val_tw.l local
151 SMLAWB r4, r4, r8, r9 \/\/ accu1 = accu1*val_tw.h - accu2*val_tw.l local
153 LDR r8, [r1], #4 \/\/ val_tw = *twiddle++; local
160 SMLAWB r7, r6, r8, r7 \/\/ accu4 = accu4*val_tw.l+accu3*val_tw.h local
161 SMLAWT r6, r6, r8, r9 \/\/ accu3 = accu3*val_tw.l-accu4*val_tw.h local
294 LDR r8, [r1], #4 \/\/ val_tw = *twiddle++ local
301 SMLAWB r9, r4, r8, r9 \/\/ accuX = accu1*val_tw.h-(-accu2)*val_tw.l local
304 SMLAWB r5, r5, r8, r4 \/\/ accu2 = (-accu2)*val_tw.t+accu1*val_tw.l local
305 LDR r8, [r1], #4 \/\/ val_tw = *twiddle++ local
312 SMLAWT r6, r6, r8, r5 \/\/ accu3 = (-accu4)*val_tw.l-(-accu3)*val_tw.h local
313 SMLAWT r7, r7, r8, r4 \/\/ accu4 = (-accu3)*val_tw.l+(-accu4)*val_tw.h local
317 LDR r8, [r1], #4 \/\/ val_tw = *twiddle++ local
324 SMLAWB r9, r4, r8, r9 \/\/ accuX = accu1*val_tw.h-(-accu2)*val_tw.l local
327 SMLAWB r5, r5, r8, r4 \/\/ accu2 = (-accu2)*val_tw.t+accu1*val_tw.l local
328 LDR r8, [r1], #4 \/\/ val_tw = *twiddle++ local
335 SMLAWT r6, r6, r8, r5 \/\/ accu3 = (-accu4)*val_tw.l-(-accu3)*val_tw.h local
336 SMLAWT r7, r7, r8, r4 \/\/ accu4 = (-accu3)*val_tw.l+(-accu4)*val_tw.h local
[all...] |
| /external/libffi/src/ia64/ |
| unix.S | 60 mov r8 = in1
125 zxt1 r8 = r8
127 st8 [in1] = r8
131 sxt1 r8 = r8
133 st8 [in1] = r8
137 zxt2 r8 = r8
139 st8 [in1] = r8
[all...] |
| /external/jpeg/ |
| armv6_idct.S | 36 * 16-bit constants; r12 and r14 hold two of the four arguments; and r8 hold
38 * first pass, r8 to r11 are used to hold quantization values, so the loop
77 stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, r14}
89 ldmdb r12!, {r8, r9, r10, r11}
102 mul r4, r8, r4
106 orreqs r8, r1, r2
107 orreqs r8, r3, r5
108 orreqs r8, r6, r7
121 ldmdb r12!, {r8, r9, r10, r11}
132 mul r7, r8, r
[all...] |
