| /dalvik/vm/mterp/mips/ |
| header.S | 160 * Form an Effective Address rd = rbase + roff<<n;
163 #define EASN(rd, rbase, roff, rshift) .set noat; \
165 addu rd, rbase, AT; \
168 #define EAS1(rd, rbase, roff) EASN(rd, rbase, roff, 1)
169 #define EAS2(rd, rbase, roff) EASN(rd, rbase, roff, 2)
170 #define EAS3(rd, rbase, roff) EASN(rd, rbase, roff, 3)
171 #define EAS4(rd, rbase, roff) EASN(rd, rbase, roff, 4
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| /dalvik/vm/compiler/template/mips/ |
| header.S | 185 #define LOAD(rd, rbase) lw rd, 0(rbase)
186 #define LOAD_F(rd, rbase) l.s rd, (rbase)
187 #define STORE(rd, rbase) sw rd, 0(rbase)
188 #define STORE_F(rd, rbase) s.s rd, (rbase)
231 * Form an Effective Address rd = rbase + roff<<n;
234 #define EASN(rd,rbase,roff,rshift) .set noat;
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| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 192 #define LOAD(rd, rbase) lw rd, 0(rbase)
193 #define LOAD_F(rd, rbase) l.s rd, (rbase)
194 #define STORE(rd, rbase) sw rd, 0(rbase)
195 #define STORE_F(rd, rbase) s.s rd, (rbase)
238 * Form an Effective Address rd = rbase + roff<<n;
241 #define EASN(rd,rbase,roff,rshift) .set noat;
[all...] |
| /external/qemu/tcg/ppc/ |
| tcg-target.c | 529 int addr_reg, data_reg, data_reg2, r0, r1, rbase, mem_index, s_bits, bswap; local
554 rbase = 0;
656 rbase = GUEST_BASE ? TCG_GUEST_BASE_REG : 0;
668 tcg_out32 (s, LBZX | TAB (data_reg, rbase, r0));
671 tcg_out32 (s, LBZX | TAB (data_reg, rbase, r0));
676 tcg_out32 (s, LHBRX | TAB (data_reg, rbase, r0));
678 tcg_out32 (s, LHZX | TAB (data_reg, rbase, r0));
682 tcg_out32 (s, LHBRX | TAB (data_reg, rbase, r0));
685 else tcg_out32 (s, LHAX | TAB (data_reg, rbase, r0));
689 tcg_out32 (s, LWBRX | TAB (data_reg, rbase, r0))
726 int addr_reg, r0, r1, data_reg, data_reg2, mem_index, bswap, rbase; local
[all...] |
| /external/qemu/tcg/ppc64/ |
| tcg-target.c | 619 int addr_reg, data_reg, r0, r1, rbase, mem_index, s_bits, bswap; local
634 rbase = 0;
695 rbase = GUEST_BASE ? TCG_GUEST_BASE_REG : 0;
706 tcg_out32 (s, LBZX | TAB (data_reg, rbase, r0));
709 tcg_out32 (s, LBZX | TAB (data_reg, rbase, r0));
714 tcg_out32 (s, LHBRX | TAB (data_reg, rbase, r0));
716 tcg_out32 (s, LHZX | TAB (data_reg, rbase, r0));
720 tcg_out32 (s, LHBRX | TAB (data_reg, rbase, r0));
723 else tcg_out32 (s, LHAX | TAB (data_reg, rbase, r0));
727 tcg_out32 (s, LWBRX | TAB (data_reg, rbase, r0))
766 int addr_reg, r0, r1, rbase, data_reg, mem_index, bswap; local
[all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-mips.S | 167 * Form an Effective Address rd = rbase + roff<<n;
170 #define EASN(rd, rbase, roff, rshift) .set noat; \
172 addu rd, rbase, AT; \
175 #define EAS1(rd, rbase, roff) EASN(rd, rbase, roff, 1)
176 #define EAS2(rd, rbase, roff) EASN(rd, rbase, roff, 2)
177 #define EAS3(rd, rbase, roff) EASN(rd, rbase, roff, 3)
178 #define EAS4(rd, rbase, roff) EASN(rd, rbase, roff, 4
[all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| encoder.h | 347 M_Opnd(Reg_No rbase, I_32 rdisp):
348 RM_Opnd(Mem), m_disp(rdisp), m_scale(0), m_index(n_reg), m_base(rbase) {}
349 M_Opnd(I_32 disp, Reg_No rbase, Reg_No rindex, unsigned scale):
350 RM_Opnd(Mem), m_disp(disp), m_scale(scale), m_index(rindex), m_base(rbase) {}
|
| /external/clang/lib/AST/ |
| ASTContext.cpp | 6682 const FunctionType *rbase = rhs->getAs<FunctionType>(); local
[all...] |
