/external/clang/test/CodeGen/ |
arm-asm-variable.c | 27 register unsigned int rn asm("r14"); 31 asm volatile ("sub %1, %1, #32" : "=r"(d) : "r"(rn));
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/external/linux-tools-perf/util/ |
strlist.h | 53 struct rb_node *rn = rb_first(&self->entries); local 54 return rn ? rb_entry(rn, struct str_node, rb_node) : NULL; 58 struct rb_node *rn; local 61 rn = rb_next(&sn->rb_node); 62 return rn ? rb_entry(rn, struct str_node, rb_node) : NULL;
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/external/webkit/Source/JavaScriptCore/assembler/ |
ARMv7Assembler.h | 745 void add(RegisterID rd, RegisterID rn, ARMThumbImmediate imm) 747 // Rd can only be SP if Rn is also SP. 748 ASSERT((rd != ARMRegisters::sp) || (rn == ARMRegisters::sp)); 750 ASSERT(rn != ARMRegisters::pc); 753 if (rn == ARMRegisters::sp) { 761 } else if (!((rd | rn) & 8)) { 763 m_formatter.oneWordOp7Reg3Reg3Reg3(OP_ADD_imm_T1, (RegisterID)imm.getUInt3(), rn, rd); 765 } else if ((rd == rn) && imm.isUInt8()) { 772 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_ADD_imm_T3, rn, rd, imm); 775 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_ADD_imm_T4, rn, rd, imm) [all...] |
ARMAssembler.h | 259 void emitInst(ARMWord op, int rd, int rn, ARMWord op2) 262 m_buffer.putInt(op | RN(rn) | RD(rd) | op2); 281 void and_r(int rd, int rn, ARMWord op2, Condition cc = AL) 283 emitInst(static_cast<ARMWord>(cc) | AND, rd, rn, op2); 286 void ands_r(int rd, int rn, ARMWord op2, Condition cc = AL) 288 emitInst(static_cast<ARMWord>(cc) | AND | SET_CC, rd, rn, op2); local 291 void eor_r(int rd, int rn, ARMWord op2, Condition cc = AL) 293 emitInst(static_cast<ARMWord>(cc) | EOR, rd, rn, op2); 296 void eors_r(int rd, int rn, ARMWord op2, Condition cc = AL 298 emitInst(static_cast<ARMWord>(cc) | EOR | SET_CC, rd, rn, op2); local 308 emitInst(static_cast<ARMWord>(cc) | SUB | SET_CC, rd, rn, op2); local 318 emitInst(static_cast<ARMWord>(cc) | RSB | SET_CC, rd, rn, op2); local 328 emitInst(static_cast<ARMWord>(cc) | ADD | SET_CC, rd, rn, op2); local 338 emitInst(static_cast<ARMWord>(cc) | ADC | SET_CC, rd, rn, op2); local 348 emitInst(static_cast<ARMWord>(cc) | SBC | SET_CC, rd, rn, op2); local 358 emitInst(static_cast<ARMWord>(cc) | RSC | SET_CC, rd, rn, op2); local 363 emitInst(static_cast<ARMWord>(cc) | TST | SET_CC, 0, rn, op2); local 368 emitInst(static_cast<ARMWord>(cc) | TEQ | SET_CC, 0, rn, op2); local 373 emitInst(static_cast<ARMWord>(cc) | CMP | SET_CC, 0, rn, op2); local 378 emitInst(static_cast<ARMWord>(cc) | CMN | SET_CC, 0, rn, op2); local 388 emitInst(static_cast<ARMWord>(cc) | ORR | SET_CC, rd, rn, op2); local 422 emitInst(static_cast<ARMWord>(cc) | BIC | SET_CC, rd, rn, op2); local 512 emitInst(static_cast<ARMWord>(cc) | LDRH | HDT_UH | DT_UP | DT_PRE, rd, rn, rm); local 527 emitInst(static_cast<ARMWord>(cc) | STRH | HDT_UH | DT_UP | DT_PRE, rd, rn, rm); local [all...] |
SH4Assembler.h | 220 inline uint16_t getOpcodeGroup1(uint16_t opc, int rm, int rn) 222 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4)); 230 inline uint16_t getOpcodeGroup3(uint16_t opc, int rm, int rn) 232 return (opc | ((rm & 0xf) << 8) | (rn & 0xff)); 235 inline uint16_t getOpcodeGroup4(uint16_t opc, int rm, int rn, int offset) 237 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4) | (offset & 0xf)); 255 inline uint16_t getOpcodeGroup8(uint16_t opc, int rm, int rn) 257 return (opc | ((rm & 0x7) << 9) | ((rn & 0x7) << 5)); 260 inline uint16_t getOpcodeGroup9(uint16_t opc, int rm, int rn) 262 return (opc | ((rm & 0xf) << 8) | ((rn & 0x7) << 5)) [all...] |
/external/valgrind/main/none/tests/arm/ |
v6media.stdout.exp | 2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000 3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000 4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000 10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000 11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000 12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=000 [all...] |
v6intARM.stdout.exp | 25 adds r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z 26 adds r0, r1, r2 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, carryin 0, cpsr 0x00000000 27 adds r0, r1, r2 :: rd 0x00000001 rm 0x00000001, rn 0x00000000, carryin 0, cpsr 0x00000000 28 adds r0, r1, r2 :: rd 0x00000002 rm 0x00000001, rn 0x00000001, carryin 0, cpsr 0x00000000 29 adds r0, r1, r2 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x80000000 N 30 adds r0, r1, r2 :: rd 0x00000000 rm 0x00000001, rn 0xffffffff, carryin 0, cpsr 0x60000000 ZC 31 adds r0, r1, r2 :: rd 0x80000000 rm 0x7fffffff, rn 0x00000001, carryin 0, cpsr 0x90000000 N V 32 adds r0, r1, r2 :: rd 0x7fffffff rm 0x80000000, rn 0xffffffff, carryin 0, cpsr 0x30000000 CV 33 adds r0, r1, r2 :: rd 0x80000000 rm 0x80000000, rn 0x00000000, carryin 0, cpsr 0x80000000 N 35 adcs r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z [all...] |
v6intThumb.stdout.exp | 2 cmp r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x60000000 ZC 3 cmp r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x20000000 C 4 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N 5 cmp r3, r6 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C 6 cmp r3, r6 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, c:v-in 0, cpsr 0x00000000 7 cmp r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x90000000 N V 8 cmp r3, r6 :: rd 0x00000000 rm 0x80000000, rn 0x00000000, c:v-in 0, cpsr 0xa0000000 N C 9 cmp r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x60000000 ZC 10 cmp r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x20000000 C 11 cmp r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x80000000 N [all...] |
/external/ipsec-tools/src/racoon/samples/roadwarrior/client/ |
phase1-down.sh | 11 DEFAULT_GW=`netstat -rn | awk '($1 == "default"){print $2}'` 14 DEFAULT_GW=`netstat -rn | awk '($1 == "0.0.0.0"){print $2}'` 34 if=`netstat -rn|awk '($1 == "default"){print $7}'` 41 if=`netstat -rn|awk '($1 == "0.0.0.0"){print $8}'`
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phase1-up.sh | 10 DEFAULT_GW=`netstat -rn | awk '($1 == "default"){print $2}'` 13 DEFAULT_GW=`netstat -rn | awk '($1 == "0.0.0.0"){print $2}'` 35 if=`netstat -rn|awk '($1 == "default"){print $7}'` 42 if=`netstat -rn|awk '($1 == "0.0.0.0"){print $8}'`
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/external/qemu/tcg/arm/ |
tcg-target.c | 342 static inline void tcg_out_bx(TCGContext *s, int cond, int rn) 344 tcg_out32(s, (cond << 28) | 0x012fff10 | rn); local 373 static inline void tcg_out_blx(TCGContext *s, int cond, int rn) 375 tcg_out32(s, (cond << 28) | 0x012fff30 | rn); local 385 int cond, int opc, int rd, int rn, int rm, int shift) 388 (rn << 16) | (rd << 12) | shift | rm); 411 int cond, int opc, int rd, int rn, int im) 414 (rn << 16) | (rd << 12) | im); 436 int rn = 0; local 443 tcg_out_dat_imm(s, cond, opc, rd, rn, ((arg >> i) & 0xff) | rot) [all...] |
/external/v8/src/arm/ |
disasm-arm.cc | 324 if (format[1] == 'n') { // 'rn: Rn register 692 // Rn field to encode it. 693 Format(instr, "mul'cond's 'rn, 'rm, 'rs"); 696 // of registers as "Rd, Rm, Rs, Rn". But confusingly it uses the 697 // Rn field to encode the Rd register and the Rd field to encode 698 // the Rn register. 699 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd"); 703 // when referring to the target registers. They are mapped to the Rn 706 // RdHi == Rn fiel [all...] |
simulator-arm.cc | 1585 int rn = instr->RnValue(); local 2013 int rn = instr->RnValue(); local 2078 int rn = instr->RnValue(); local 2257 int rn = instr->RnValue(); local 2480 int rn = instr->RnValue(); local 2544 int rn = instr->RnValue(); local 3138 int rn = instr->RnValue(); local 3175 int rn = instr->RnValue(); local 3194 int rn = instr->RnValue(); local [all...] |
/external/openssl/crypto/lhash/ |
lhash.c | 182 LHASH_NODE *nn,**rn; local 189 rn=getrn(lh,data,&hash); 191 if (*rn == NULL) 203 *rn=nn; 210 ret= (*rn)->data; 211 (*rn)->data=data; 220 LHASH_NODE *nn,**rn; local 224 rn=getrn(lh,data,&hash); 226 if (*rn == NULL) 233 nn= *rn; 251 LHASH_NODE **rn; local [all...] |
/external/qemu/target-mips/ |
translate.c | 2900 const char *rn = "invalid"; local 3477 const char *rn = "invalid"; local 4073 const char *rn = "invalid"; local 4639 const char *rn = "invalid"; local [all...] |
/sdk/emulator/qtools/ |
armdis.cpp | 150 uint8_t rn = (insn >> 16) & 0xf; local 170 // The "mov" instruction ignores the first operand (rn). 173 sprintf(rn_str, "r%d, ", rn); 250 uint8_t rn = insn & 0xf; local 251 sprintf(ptr, "bx%s\tr%d", cond_to_str(cond), rn); 280 uint8_t rn = (insn >> 16) & 0xf; local 319 opname, cond_to_str(cond), addr_mode, rn, bang, tmp_list, carret); 332 uint8_t rn = (insn >> 16) & 0xf; local 356 opname, cond_to_str(cond), byte, rd, rn); 359 opname, cond_to_str(cond), byte, rd, rn, minus, offset, bang) 429 uint8_t rn = (insn >> 16) & 0xf; local 498 uint8_t rn = (insn >> 12) & 0xf; local 588 uint8_t rn = (insn >> 16) & 0xf; local 621 uint8_t rn = (insn >> 16) & 0xf; local [all...] |
/frameworks/compile/slang/BitWriter_2_9/ |
BitcodeWriterPass.cpp | 72 for (unsigned ri = 0, rn = CaseRanges.getNumItems(); ri != rn; ++ri) {
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/frameworks/compile/slang/BitWriter_2_9_func/ |
BitcodeWriterPass.cpp | 72 for (unsigned ri = 0, rn = CaseRanges.getNumItems(); ri != rn; ++ri) {
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/external/wpa_supplicant_8/src/wps/ |
ndef.c | 195 struct wpabuf *rn, *cr, *ac_payload, *ac, *hr_payload, *hr; local 198 rn = wpabuf_alloc(2); 199 if (rn == NULL) 201 wpabuf_put_be16(rn, os_random() & 0xffff); 204 NULL, 0, rn); 205 wpabuf_free(rn);
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/external/qemu/target-arm/ |
translate.c | 2727 uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask; local 3829 int rd, rn, rm; local 4420 int rd, rn, rm; local 6417 unsigned int cond, insn, val, op1, i, shift, rm, rs, rn, rd, sh; local 7782 uint32_t rd, rn, rm, rs; local 8852 uint32_t val, insn, op, rm, rn, rd, shift, cond; local [all...] |
op_helper.c | 32 uint32_t rn, uint32_t maxindex) 39 table = (uint64_t *)&env->vfp.regs[rn]; 513 const int rn = (insn >> 16) & 0xf; local 518 uint32_t addr = env->regs[rn]; 525 addr = env->regs[rn] + (1 << size) * reg; 527 addr = env->regs[rn] + (1 << size);
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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.apache.ant_1.7.1.v20090120-1145/lib/ |
ant-jmf.jar | |
/external/srec/srec_jni/ |
android_speech_srec_Recognizer.cpp | 192 const char* rn = env->GetStringUTFChars(ruleName, 0); local 193 checkEsrError(env, SR_RecognizerSetupRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn)); 194 env->ReleaseStringUTFChars(ruleName, rn); 206 const char* rn = env->GetStringUTFChars(ruleName, 0); local 207 checkEsrError(env, SR_RecognizerActivateRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn, weight)); 208 env->ReleaseStringUTFChars(ruleName, rn); 213 const char* rn = env->GetStringUTFChars(ruleName, 0); local 214 checkEsrError(env, SR_RecognizerDeactivateRule((SR_Recognizer*)recognizer, (SR_Grammar*)grammar, rn)); 215 env->ReleaseStringUTFChars(ruleName, rn); 226 const char* rn = env->GetStringUTFChars(ruleName, 0) local [all...] |
/external/icu4c/i18n/ |
uspoof_wsconf.cpp | 318 for (int32_t rn=0; rn<ignoreSet.getRangeCount(); rn++) { 319 UChar32 rangeStart = ignoreSet.getRangeStart(rn); 320 UChar32 rangeEnd = ignoreSet.getRangeEnd(rn);
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/external/opencv/cv/src/ |
cvhough.cpp | 211 int rn, tn; /* number of rho and theta discrete values */ local 254 rn = cvFloor( sqrt( (double)w * w + (double)h * h ) * irho ); 270 CV_CALL( caccum = (uchar*)cvAlloc( rn * tn * sizeof( caccum[0] ))); 271 memset( caccum, 0, rn * tn * sizeof( caccum[0] )); 323 assert( i < rn * tn ); 335 for( ri = 0; ri < rn; ri++ ) 346 if( count * 100 > rn * tn ) 356 for( ri = 0; ri < rn; ri++ ) [all...] |