| /external/webrtc/src/common_audio/signal_processing/ |
| spl_sqrt_floor.s | 21 cmp r0, r2, ror #2 * 0
22 subhs r0, r0, r2, ror #2 * 0
25 cmp r0, r2, ror #2 * 1
26 subhs r0, r0, r2, ror #2 * 1
29 cmp r0, r2, ror #2 * 2
30 subhs r0, r0, r2, ror #2 * 2
33 cmp r0, r2, ror #2 * 3
34 subhs r0, r0, r2, ror #2 * 3
37 cmp r0, r2, ror #2 * 4
38 subhs r0, r0, r2, ror #2 *
[all...] |
| /external/compiler-rt/lib/arm/ |
| bswapsi2.S | 21 eor r1, r0, r0, ror #16
24 eor r0, r1, r0, ror #8
|
| bswapdi2.S | 22 eor r2, r0, r0, ror #16
25 eor r2, r2, r0, ror #8
27 eor r0, r1, r1, ror #16
30 eor r0, r0, r1, ror #8
|
| /external/openssl/crypto/sha/asm/ |
| sha1-armv4-large.S | 17 mov r5,r5,ror#30
18 mov r6,r6,ror#30
19 mov r7,r7,ror#30 @ [6]
25 add r7,r8,r7,ror#2 @ E+=K_00_19
30 add r7,r7,r3,ror#27 @ E+=ROR(A,27)
34 add r7,r8,r7,ror#2 @ E+=K_00_19
36 add r7,r7,r3,ror#27 @ E+=ROR(A,27)
41 and r10,r4,r10,ror#
[all...] |
| sha256-armv4.S | 48 mov r0,r8,ror#6
50 eor r0,r0,r8,ror#11
60 eor r0,r0,r8,ror#25 @ Sigma1(e)
66 mov r11,r4,ror#2
68 eor r11,r11,r4,ror#13
70 eor r11,r11,r4,ror#22 @ Sigma0(a)
92 mov r0,r7,ror#6
94 eor r0,r0,r7,ror#11
104 eor r0,r0,r7,ror#25 @ Sigma1(e)
110 mov r10,r11,ror#
[all...] |
| sha1-armv4-large.pl | 80 add $e,$K,$e,ror#2 @ E+=K_xx_xx
85 mov $t0,$t0,ror#31
86 add $e,$e,$a,ror#27 @ E+=ROR(A,27)
87 eor $t0,$t0,$t2,ror#31
102 add $e,$K,$e,ror#2 @ E+=K_00_19
107 add $e,$e,$a,ror#27 @ E+=ROR(A,27)
111 add $e,$K,$e,ror#2 @ E+=K_00_19
113 add $e,$e,$a,ror#27 @ E+=ROR(A,27
[all...] |
| sha256-586.pl | 52 &ror ("ecx",25-11);
55 &ror ("ecx",11-6);
58 &ror ("ecx",6); # Sigma1(e)
71 &ror ("ecx",22-13);
74 &ror ("ecx",13-2);
77 &ror ("ecx",2); # Sigma0(a)
170 &ror ("esi",18-7);
173 &ror ("esi",7);
176 &ror ("edi",19-17);
179 &ror ("edi",17)
[all...] |
| sha256-armv4.pl | 67 mov $t0,$e,ror#$Sigma1[0]
69 eor $t0,$t0,$e,ror#$Sigma1[1]
79 eor $t0,$t0,$e,ror#$Sigma1[2] @ Sigma1(e)
85 mov $h,$a,ror#$Sigma0[0]
87 eor $h,$h,$a,ror#$Sigma0[1]
89 eor $h,$h,$a,ror#$Sigma0[2] @ Sigma0(a)
109 mov $t0,$t3,ror#$sigma0[0]
111 eor $t0,$t0,$t3,ror#$sigma0[1]
114 mov $t3,$t2,ror#$sigma1[0]
116 eor $t3,$t3,$t2,ror#$sigma1[1
[all...] |
| sha512-x86_64.pl | 99 ror \$`$Sigma1[2]-$Sigma1[1]`,$a0
103 ror \$`$Sigma0[2]-$Sigma0[1]`,$a1
107 ror \$`$Sigma1[1]-$Sigma1[0]`,$a0
115 ror \$`$Sigma0[1]-$Sigma0[0]`,$a1
124 ror \$$Sigma1[0],$a0 # Sigma1(e)
128 ror \$$Sigma0[0],$a1 # Sigma0(a)
149 ror \$`$sigma0[1]-$sigma0[0]`,$T1
153 ror \$$sigma0[0],$T1
157 ror \$`$sigma1[1]-$sigma1[0]`,$a2
161 ror \$$sigma1[0],$a
[all...] |
| /external/libvpx/libvpx/vp8/encoder/arm/armv6/ |
| vp8_subtract_armv6.asm | 49 uxtb16 r0, r0, ror #8 ; [s3 | s1]
50 uxtb16 r1, r1, ror #8 ; [p3 | p1]
95 uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
96 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
112 uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
113 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
140 uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
141 uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
157 uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
158 uxtb16 r11, r11, ror #8 ; [p3 | p1] (B
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| dc_only_idct_add_v6.asm | 36 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1
38 uxtab16 r6, r0, r6, ror #8
51 uxtab16 r4, r0, r4, ror #8
53 uxtab16 r6, r0, r6, ror #8
|
| intra4x4_predict_v6.asm | 93 uxtb16 r11, r8, ror #8 ; a[3|1]
149 uxtb16 r5, r8, ror #8 ; a[3|1]
229 uxtb16 r7, r4, ror #8 ; a[3|1]
231 uxtb16 r9, r5, ror #8 ; a[7|5]
236 add r4, r4, r10, ror #16 ; [a2+2*a3+a4 | a0+2*a1+a2]
239 add r5, r7, r10, ror #15 ; [a3+2*a4 | a1+2*a2]
240 add r5, r5, r11, ror #16 ; [a3+2*a4+a5 | a1+2*a2+a3]
290 uxtb16 r10, lr, ror #8 ; p[8|6]
329 uxtab r9, r9, r4, ror #16 ; [5|4|3|2]
353 uxtb16 r10, lr, ror #8 ; p[8|6
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | 58 adc r4, r5, r6, ror #1
59 adc r4, r5, r6, ror #31
65 adc r6, r7, r8, ror r9
78 adc r4, r5, ror #1
79 adc r4, r5, ror #31
84 adc r6, r7, ror r9
97 @ CHECK: adc r4, r5, r6, ror #1 @ encoding: [0xe6,0x40,0xa5,0xe0]
98 @ CHECK: adc r4, r5, r6, ror #31 @ encoding: [0xe6,0x4f,0xa5,0xe0]
103 @ CHECK: adc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xa7,0xe0]
115 @ CHECK: adc r4, r4, r5, ror #1 @ encoding: [0xe5,0x40,0xa4,0xe0
[all...] |
| arm-aliases.s | 6 sub r1, r2, r3, ror #0
9 and r1, r2, r3, ror #0
|
| arm-shift-encoding.s | 11 ldr r0, [r0, r0, ror #16]
21 @ CHECK: ldr r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x90,0xe7]
31 pld [r0, r0, ror #16]
41 @ CHECK: [r0, r0, ror #16] @ encoding: [0x60,0xf8,0xd0,0xf7]
51 str r0, [r0, r0, ror #16]
61 @ CHECK: str r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x80,0xe7]
69 ldr r3, [r4], r5, ror #0
89 adc r8, r1, r0, ror #16
99 @ CHECK: adc r8, r1, r0, ror #16 @ encoding: [0x60,0x88,0xa1,0xe0]
109 cmp r8, r1, ror #1
[all...] |
| thumb-shift-encoding.s | 15 sbc.w r8, r1, r0, ror #16
25 @ CHECK: sbc.w r8, r1, r0, ror #16 @ encoding: [0x61,0xeb,0x30,0x48]
35 and.w r8, r1, r0, ror #16
45 @ CHECK: and.w r8, r1, r0, ror #16 @ encoding: [0x01,0xea,0x30,0x48]
|
| diagnostics.s | 20 adc r4, r5, r6, ror #-1
21 adc r4, r5, r6, ror #32
45 @ CHECK-ERRORS: adc r4, r5, r6, ror #-1
48 @ CHECK-ERRORS: adc r4, r5, r6, ror #32
58 ldr r4, [r5, r6, ror #-1]
59 pld r4, [r5, r6, ror #32]
84 @ CHECK-ERRORS: ldr r4, [r5, r6, ror #-1]
87 @ CHECK-ERRORS: pld r4, [r5, r6, ror #32]
284 sxtb r8, r3, ror 24
285 sxtb r8, r3, ror #8
[all...] |
| basic-thumb2-instructions.s | 47 adc r0, r1, r3, ror #4
57 @ CHECK: adc.w r0, r1, r3, ror #4 @ encoding: [0x41,0xeb,0x33,0x10]
119 add.w r4, r8, r1, ror #12
127 @ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34]
165 and.w r9, r12, r1, ror #17
171 @ CHECK: and.w r9, r12, r1, ror #17 @ encoding: [0x0c,0xea,0x71,0x49]
263 bic r5, r6, r8, ror #1
272 bic r12, r6, ror #29
280 @ CHECK: bic.w r5, r6, r8, ror #1 @ encoding: [0x26,0xea,0x78,0x05]
288 @ CHECK: bic.w r12, r12, r6, ror #29 @ encoding: [0x2c,0xea,0x76,0x7c
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror;
|
| /external/valgrind/main/none/tests/arm/ |
| v6intARM.stdout.exp | 295 ROR
296 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000000, carryin 0, cpsr 0x00000000
297 ror r0, r1, r2 :: rd 0x40044000 rm 0x80088000, rn 0x00000001, carryin 0, cpsr 0x00000000
298 ror r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000001, carryin 0, cpsr 0x00000000
299 ror r0, r1, r2 :: rd 0x00022000 rm 0x00088000, rn 0x00000002, carryin 0, cpsr 0x00000000
300 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000001f, carryin 0, cpsr 0x00000000
301 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000020, carryin 0, cpsr 0x00000000
302 ror r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000021, carryin 0, cpsr 0x00000000
303 ror r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000003f, carryin 0, cpsr 0x00000000
304 ror r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000040, carryin 0, cpsr 0x00000000
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| logical_shifted_reg.s | 60 eon w3, w1, w2, ror #20
63 and w1, w1, w2, ror #20
128 eon x2, x0, x1, ror #20
131 and x0, x0, x1, ror #20
|
| /bionic/libc/arch-arm/cortex-a15/bionic/ |
| strcmp.S | 212 uxtb r3, r2, ror #BYTE1_OFFSET
219 uxtb r3, r2, ror #BYTE2_OFFSET
226 uxtb r3, r2, ror #BYTE3_OFFSET
|
| /external/openssl/crypto/aes/asm/ |
| aes-armv4.S | 247 eor r0,r0,r7,ror#8
250 eor r5,r5,r8,ror#8
252 eor r6,r6,r9,ror#8
255 eor r1,r1,r4,ror#24
260 eor r0,r0,r7,ror#16
263 eor r1,r1,r8,ror#8
265 eor r6,r6,r9,ror#16
268 eor r2,r2,r5,ror#16
273 eor r0,r0,r7,ror#24
275 eor r1,r1,r8,ror#1
[all...] |
| aes-armv4.pl | 300 eor $s0,$s0,$i1,ror#8
303 eor $t2,$t2,$i2,ror#8
305 eor $t3,$t3,$i3,ror#8
308 eor $s1,$s1,$t1,ror#24
313 eor $s0,$s0,$i1,ror#16
316 eor $s1,$s1,$i2,ror#8
318 eor $t3,$t3,$i3,ror#16
321 eor $s2,$s2,$t2,ror#16
326 eor $s0,$s0,$i1,ror#24
328 eor $s1,$s1,$i2,ror#1
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAddressingModes.h | 32 ror, enumerator in enum:llvm::ARM_AM::ShiftOpc
51 case ARM_AM::ror: return "ror";
62 case ARM_AM::ror: return 3;
105 // reg [asr|lsl|lsr|ror|rrx] reg
106 // reg [asr|lsl|lsr|ror|rrx] imm
|
