| /external/llvm/lib/Transforms/Utils/ |
| LowerInvoke.cpp | 267 // we spill into a stack location, guaranteeing that there is nothing live
351 // and spill the value.
382 // If we decided we need a spill, do it.
423 // we spill into a stack location, guaranteeing that there is nothing live
|
| /external/llvm/test/CodeGen/ARM/ |
| 2010-05-20-NEONSpillCrash.ll | 3 ; This test would crash the rewriter when trying to handle a spill after one of
|
| /external/oprofile/module/ia64/ |
| oprofile_stubs.S | 95 stf.spill [sp]=f0
|
| /external/webkit/Source/WebCore/platform/ |
| Theme.h | 102 // Some controls may spill out of their containers (e.g., the check on an OS X checkbox). When these controls repaint,
|
| /packages/apps/Settings/res/values-nb/ |
| arrays.xml | 266 <item msgid="1097324338692486211">"spill inn lyd"</item>
267 <item msgid="5031552983987798163">"spill av lyd"</item>
299 <item msgid="1720492593061838172">"Spill inn lyd"</item>
300 <item msgid="3493046322001257041">"Spill av lyd"</item>
|
| /bionic/libc/arch-arm/generic/bionic/ |
| memcpy.S | 87 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
204 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
|
| /external/llvm/lib/CodeGen/ |
| VirtRegMap.cpp | 14 // references by replacing them with physical register references - adding spill
41 STATISTIC(NumSpillSlots, "Number of spill slots allocated");
|
| SjLjEHPrepare.cpp | 282 /// edge and spill them.
338 DEBUG(dbgs() << "SJLJ Spill: " << *Inst << " around "
345 // If we decided we need a spill, do it.
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| /external/llvm/lib/Target/ARM/ |
| README-Thumb.txt | 18 temporaries to spill values into.
187 These instructions preserve the condition code which is important if the spill
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 170 // R10 is live-in. It is killed at the spill.
288 // Add the callee-saved register as live-in. It's killed at the spill.
|
| /external/v8/src/ |
| lithium.h | 523 // Allocation index indexed arrays of spill slot operands for registers
524 // that are also in spill slots at an OSR entry. NULL for environments
|
| /external/valgrind/main/coregrind/ |
| pub_core_threadstate.h | 106 guest state area, its two shadows, and the spill area, are
118 /* Spill area. */
|
| /external/llvm/docs/CommandGuide/ |
| llc.rst | 141 Very simple "always spill" register allocator
|
| /external/llvm/lib/Target/Mips/ |
| Mips16FrameLowering.cpp | 116 // It's killed at the spill, unless the register is RA and return address
|
| MipsFrameLowering.cpp | 121 // callee-saved spill.
|
| /external/llvm/lib/Target/X86/ |
| README-FPStack.txt | 64 folding spill code into the instructions.
|
| /external/llvm/test/CodeGen/Thumb2/ |
| crash.ll | 53 ; Make sure the DPair register class can spill.
|
| /external/llvm/test/CodeGen/X86/ |
| 2012-01-10-UndefExceptionEdge.ll | 11 ; so the return value can spill.
|
| dynamic-allocas-VLAs.ll | 134 ; VLAs + Dynamic realignment + Spill
|
| fold-pcmpeqd-2.ll | 4 ; This testcase should need to spill the -1 value on both x86-32 and x86-64,
|
| /external/webkit/Source/JavaScriptCore/dfg/ |
| DFGNonSpeculativeJIT.h | 90 // they spill all live values to the appropriate
|
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.h | 295 // 2. The RC spill size must not be smaller than our spill size.
296 // 3. RC spill alignment must be compatible with ours.
|
| /external/chromium/sdch/open-vcdiff/src/ |
| vcdecoder_test.cc | 91 // value to spill over into another byte. Luckily, this test data happens
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 197 // Add the callee-saved register as live-in. It's killed at the spill.
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.td | 179 // possible because there aren't any unused spill slots.
|
