/external/v8/src/ |
deoptimizer.cc | [all...] |
frames.cc | 661 // Visit pointer spill slots and locals. [all...] |
/external/v8/src/mips/ |
lithium-codegen-mips.cc | 414 // Local or spill slot. Skip the frame pointer, function, and 428 // Local or spill slot. Skip the frame pointer, function, context, 576 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...] |
/external/valgrind/main/massif/ |
ms_print.in | 543 # The final snapshot will spill over into the n+1th column, which
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/external/webkit/Source/WebCore/rendering/ |
RenderTableSection.cpp | 609 // do, but it will clip the cells that spill out of the table section. In [all...] |
/packages/apps/Email/res/values-nb/ |
strings.xml | 151 <string name="message_view_attachment_play_action" msgid="5214215414665114061">"Spill av"</string> [all...] |
/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/libexec/gcc/i686-linux/4.4.3/ |
cc1plus | |
/prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.6/libexec/gcc/mipsel-linux-android/4.6/ |
cc1 | |
cc1plus | |
/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/libexec/gcc/i686-linux/4.6.x-google/ |
cc1plus | |
/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.6/libexec/gcc/i686-linux-android/4.6/ |
cc1 | |
cc1plus | |
/external/valgrind/main/VEX/priv/ |
host_ppc_defs.c | 240 // GPR30 is reserved as AltiVec spill reg temporary 245 the occasional extra spill instead. */ [all...] |
host_mips_defs.c | 589 // t1 spill reg temp [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeDAG.cpp | 79 /// is necessary to spill the vector being inserted into to memory, perform 569 /// is necessary to spill the vector being inserted into to memory, perform 578 // If the target doesn't support this, we have to spill the input vector [all...] |
/external/v8/src/ia32/ |
lithium-codegen-ia32.cc | 342 // Local or spill slot. Skip the frame pointer, function, and 520 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...] |
/dalvik/vm/compiler/codegen/x86/ |
LowerInvoke.cpp | 720 //! spill a register to native stack [all...] |
/external/llvm/include/llvm/Target/ |
Target.td | 144 // Size - Specify the spill size in bits of the registers. A default value of [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | 44 NoFusing("disable-spill-fusing", 45 cl::desc("Disable fusing of spill code into instructions")); [all...] |
/external/openssl/crypto/sha/asm/ |
sha1-x86_64.pl | 45 # 32-bit code is that 64-bit code doesn't have to spill @X[] elements
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/external/qemu/tcg/ |
tcg.c | [all...] |
/external/skia/src/gpu/ |
SkGpuDevice.cpp | [all...] |
/external/webkit/Source/JavaScriptCore/yarr/ |
YarrJIT.cpp | [all...] |