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    Searched full:clk_req (Results 1 - 12 of 12) sorted by null

/hardware/ti/wlan/mac80211/ti-utils/ini_files/128x/
RFMD_S_3.5.ini	10 RefClk = 01 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: 5'bXX000 : Bit 0,1,2 - 0: 19.2MHz, 1: 26MHz, 2: 38.4MHz [Default], 3: 52MHz, 4: 38.4MHz XTAL, 5: 26MHz XTAL , 5'bX0XXX : Bit 3 - CLK_REQ type, 0 = wired-OR [Default], 1= push-pull , 5'b0XXXX : Bit 4 - CLK_REQ polarity, 0 = Normal [Default], 1=Inverted 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs 14 TCXO_SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid TCXO clock on the device inputs
TQS_S_2.6.ini	10 RefClk = 01 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: 5'bXX000 : Bit 0,1,2 - 0: 19.2MHz, 1: 26MHz, 2: 38.4MHz [Default], 3: 52MHz, 4: 38.4MHz XTAL, 5: 26MHz XTAL , 5'bX0XXX : Bit 3 - CLK_REQ type, 0 = wired-OR [Default], 1= push-pull , 5'b0XXXX : Bit 4 - CLK_REQ polarity, 0 = Normal [Default], 1=Inverted 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs 14 TCXO_SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid TCXO clock on the device inputs
TQS_D_1.0.ini	10 RefClk = 01 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: 5'bXX000 : Bit 0,1,2 - 0: 19.2MHz, 1: 26MHz, 2: 38.4MHz [Default], 3: 52MHz, 4: 38.4MHz XTAL, 5: 26MHz XTAL , 5'bX0XXX : Bit 3 - CLK_REQ type, 0 = wired-OR [Default], 1= push-pull , 5'b0XXXX : Bit 4 - CLK_REQ polarity, 0 = Normal [Default], 1=Inverted 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs 14 TCXO_SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid TCXO clock on the device inputs
TQS_D_1.7.ini	10 RefClk = 01 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: 5'bXX000 : Bit 0,1,2 - 0: 19.2MHz, 1: 26MHz, 2: 38.4MHz [Default], 3: 52MHz, 4: 38.4MHz XTAL, 5: 26MHz XTAL , 5'bX0XXX : Bit 3 - CLK_REQ type, 0 = wired-OR [Default], 1= push-pull , 5'b0XXXX : Bit 4 - CLK_REQ polarity, 0 = Normal [Default], 1=Inverted 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs 14 TCXO_SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid TCXO clock on the device inputs
/hardware/ti/wlan/mac80211/ti-utils/ini_files/127x/
RFMD_S_3.5.ini	10 RefClk = 02 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: Bit 0,1,2-0:19.2MHz,1:26MHz,2:38.4MHz[Default],3:52MHz,4:38.4MHz XTAL,5:26MHz XTAL, Bit 3-CLK_REQ type, 0=wired-OR, 1=push-pull, Bit 4-CLK_REQ polarity 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs
TQS_D_1.0.ini	10 RefClk = 02 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: Bit 0,1,2-0:19.2MHz,1:26MHz,2:38.4MHz[Default],3:52MHz,4:38.4MHz XTAL,5:26MHz XTAL, Bit 3-CLK_REQ type, 0=wired-OR, 1=push-pull, Bit 4-CLK_REQ polarity 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs
TQS_D_1.7.ini	10 RefClk = 02 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: Bit 0,1,2-0:19.2MHz,1:26MHz,2:38.4MHz[Default],3:52MHz,4:38.4MHz XTAL,5:26MHz XTAL, Bit 3-CLK_REQ type, 0=wired-OR, 1=push-pull, Bit 4-CLK_REQ polarity 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs
TQS_S_2.5.ini	10 RefClk = 02 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: Bit 0,1,2-0:19.2MHz,1:26MHz,2:38.4MHz[Default],3:52MHz,4:38.4MHz XTAL,5:26MHz XTAL, Bit 3-CLK_REQ type, 0=wired-OR, 1=push-pull, Bit 4-CLK_REQ polarity 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs
TQS_S_2.6.ini	10 RefClk = 02 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: Bit 0,1,2-0:19.2MHz,1:26MHz,2:38.4MHz[Default],3:52MHz,4:38.4MHz XTAL,5:26MHz XTAL, Bit 3-CLK_REQ type, 0=wired-OR, 1=push-pull, Bit 4-CLK_REQ polarity 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs
/hardware/ti/wlan/mac80211/config/
TQS_D_1.7.ini	10 RefClk = 01 # Length: 1; Unit: Bit_Options; Format: Unsigned; Source: Customer; Comment: 5'bXX000 : Bit 0,1,2 - 0: 19.2MHz, 1: 26MHz, 2: 38.4MHz [Default], 3: 52MHz, 4: 38.4MHz XTAL, 5: 26MHz XTAL , 5'bX0XXX : Bit 3 - CLK_REQ type, 0 = wired-OR [Default], 1= push-pull , 5'b0XXXX : Bit 4 - CLK_REQ polarity, 0 = Normal [Default], 1=Inverted 11 SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid FREF clock on the device inputs 14 TCXO_SettlingTime = 05 # Length: 1; Unit: ms (0-15); Format: Unsigned; Source: Customer; Comment: The time from asserting CLK_REQ (low to high) to valid TCXO clock on the device inputs
/external/libnfc-nxp/src/
phHciNfc_DevMgmt.c	716 psHciContext->p_config_params)->clk_req ;     [all...]
/external/libnfc-nxp/inc/
phNfcHalTypes.h	187 uint8_t clk_req; /**< Clock Request Setting */ member in struct:phHal_sHwConfig     [all...]

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