| /external/wpa_supplicant_8/src/crypto/ |
| aes_i.h | 70 static inline u32 rotr(u32 val, int bits) function
76 #define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
77 #define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
78 #define TE3(i) rotr(Te0[(i) & 0xff], 24)
94 #define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
95 #define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
96 #define TD3(i) rotr(Td0[(i) & 0xff], 24)
102 #define TD1_(i) rotr(Td0[(i) & 0xff], 8)
103 #define TD2_(i) rotr(Td0[(i) & 0xff], 16)
104 #define TD3_(i) rotr(Td0[(i) & 0xff], 24
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| rotate.ll | 13 ; CHECK: rotr $2, $4, 22
32 ; CHECK: rotr $2, $4, 10
|
| bswap.ll | 8 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
|
| /external/llvm/test/TableGen/ |
| SetTheory.td | 114 // The 'rotr' operator rotates right, but also accepts a negative shift.
115 def rotr;
116 def S7a : Set<(rotr S0f, 0)>;
117 def S7b : Set<(rotr S0f, 1)>;
118 def S7c : Set<(rotr S0f, 3)>;
119 def S7d : Set<(rotr S0f, 4)>;
120 def S7e : Set<(rotr S0f, 5)>;
121 def S7f : Set<(rotr S0f, -1)>;
122 def S7g : Set<(rotr S0f, -4)>;
123 def S7h : Set<(rotr S0f, -5)>
[all...] |
| /external/skia/include/core/ |
| SkChecksum.h | 20 ROTR = 17,
21 ROTL = sizeof(uintptr_t) * 8 - ROTR,
26 return ((total >> ROTR) | (total << ROTL)) ^ value;
|
| /external/openssl/crypto/des/asm/ |
| crypt586.pl | 109 &rotr( $t, 4 );
174 { &rotr($tt, 3-$lr); }
180 { &rotr($r, 2-$lr); }
193 else { &rotr($r, $lr-2); }
199 else { &rotr($l, $lr-3); }
207 &rotr($tt , 4);
|
| des-586.pl | 187 &rotr($L,3); # r
189 &rotr($R,3); # l
217 &rotr( $t, 4 );
279 { &rotr($tt, 3-$lr); }
285 { &rotr($r, 2-$lr); }
298 else { &rotr($r, $lr-2); }
304 else { &rotr($l, $lr-3); }
312 &rotr($tt , 4);
|
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror;
30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
|
| /external/kernel-headers/original/asm-mips/ |
| byteorder.h | 33 " rotr %0, %0, 16 \n"
|
| /external/llvm/unittests/ADT/ |
| APIntTest.cpp | 158 EXPECT_EQ(one, one.rotr(0));
159 EXPECT_EQ(one, one.rotr(1));
508 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(0));
509 EXPECT_EQ(APInt(8, 8), APInt(8, 16).rotr(1));
510 EXPECT_EQ(APInt(8, 4), APInt(8, 16).rotr(2));
511 EXPECT_EQ(APInt(8, 1), APInt(8, 16).rotr(4));
512 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(8));
514 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotr(0));
515 EXPECT_EQ(APInt(8, 128), APInt(8, 1).rotr(1));
516 EXPECT_EQ(APInt(8, 64), APInt(8, 1).rotr(2))
[all...] |
| /external/openssl/crypto/bf/asm/ |
| bf-686.pl | 95 &rotr( $R, 16);
101 &rotr( $R, 16);
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 280 COMPARE(rotr(a0, a1, 0),
281 "00252002 rotr a0, a1, 0");
282 COMPARE(rotr(s0, s1, 8),
283 "00318202 rotr s0, s1, 8");
284 COMPARE(rotr(t2, t3, 24),
285 "002b5602 rotr t2, t3, 24");
286 COMPARE(rotr(v0, v1, 31),
287 "002317c2 rotr v0, v1, 31");
|
| /external/openssl/crypto/sha/ |
| sha512.c | 309 # define ROTR(a,n) ({ SHA_LONG64 ret; \
339 # define ROTR(a,n) ({ SHA_LONG64 ret; \
347 # define ROTR(a,n) _rotr64((a),n)
382 #ifndef ROTR
383 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s))
386 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
387 #define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41)
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-ia64.pl | 182 .rotr X[16]
220 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
453 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
459 _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18)
463 _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41)
467 _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28)
471 _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34)
475 _rotr r8=$t0,$Sigma0[2] } // ROTR(a,39)
491 .rotr X[16]
493 _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1
[all...] |
| sha512-586.pl | 138 #define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
201 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
448 #define sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
484 #define sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| sha512-armv4.pl | 75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
322 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| sha512-armv4.S | 131 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
186 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
225 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
242 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrShiftRotate.td | 576 [(set GR8:$dst, (rotr GR8:$src1, CL))], IIC_SR>;
579 [(set GR16:$dst, (rotr GR16:$src1, CL))], IIC_SR>, OpSize;
582 [(set GR32:$dst, (rotr GR32:$src1, CL))], IIC_SR>;
585 [(set GR64:$dst, (rotr GR64:$src1, CL))], IIC_SR>;
590 [(set GR8:$dst, (rotr GR8:$src1, (i8 imm:$src2)))], IIC_SR>;
593 [(set GR16:$dst, (rotr GR16:$src1, (i8 imm:$src2)))],
598 [(set GR32:$dst, (rotr GR32:$src1, (i8 imm:$src2)))],
603 [(set GR64:$dst, (rotr GR64:$src1, (i8 imm:$src2)))],
609 [(set GR8:$dst, (rotr GR8:$src1, (i8 1)))],
613 [(set GR16:$dst, (rotr GR16:$src1, (i8 1)))]
[all...] |
| /bionic/libc/arch-mips/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| endian.h | 45 __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
|
| /external/llvm/test/MC/Mips/ |
| mips-alu-instructions.s | 17 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
44 rotr $9, $6, 7
|
| mips64-alu-instructions.s | 17 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
44 rotr $9, $6, 7
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.c | [all...] |
