Lines Matching refs:PhysicalReg_ESP
287 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
288 move_imm_to_mem(OpndSize_32, tmp, 4, PhysicalReg_ESP, true);
291 move_imm_to_mem(OpndSize_32, (int) currentMethod->clazz->pDvmDex, 12, PhysicalReg_ESP, true);
295 move_imm_to_mem(OpndSize_32, (int) currentMethod, 8, PhysicalReg_ESP, true);
296 move_reg_to_mem(OpndSize_32, 5, false, 0, PhysicalReg_ESP, true);
299 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
575 load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
577 move_chain_to_mem(OpndSize_32, traceCurrentBB->fallThrough->id, 4, PhysicalReg_ESP, true);
582 move_chain_to_mem(OpndSize_32, takenId, 0, PhysicalReg_ESP, true);
724 load_effective_addr(-4, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
725 move_reg_to_mem(OpndSize_32, reg, isPhysical, 0, PhysicalReg_ESP, true);
732 move_mem_to_reg(OpndSize_32, 0, PhysicalReg_ESP, true, reg, isPhysical);
733 load_effective_addr(4, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
795 move_mem_to_reg(OpndSize_32, 4, PhysicalReg_ESP, true,
818 move_mem_to_reg(OpndSize_32, 4, PhysicalReg_ESP, true,
835 load_effective_addr(8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
845 move_mem_to_reg(OpndSize_32, 0, PhysicalReg_ESP, true,
847 load_effective_addr(8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
864 // load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
865 load_effective_addr(-28, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
866 move_reg_to_mem(OpndSize_32, P_GPR_1, true, 0, PhysicalReg_ESP, true);
867 move_reg_to_mem(OpndSize_32, P_GPR_1, true, 20, PhysicalReg_ESP, true);
870 move_reg_to_mem(OpndSize_32, PhysicalReg_ECX, true, 8, PhysicalReg_ESP, true);
871 move_reg_to_mem(OpndSize_32, P_SCRATCH_1, true, 12, PhysicalReg_ESP, true);
872 move_reg_to_mem(OpndSize_32, P_SCRATCH_1, true, 24, PhysicalReg_ESP, true);
879 move_reg_to_mem(OpndSize_32, P_SCRATCH_3, true, 4, PhysicalReg_ESP, true);
885 move_mem_to_reg(OpndSize_32, 20, PhysicalReg_ESP, true, P_GPR_3, true); //new FP
886 move_mem_to_reg(OpndSize_32, 24, PhysicalReg_ESP, true, P_GPR_1, true); //glue->self
887 load_effective_addr(28, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
891 load_effective_addr(8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
926 //load_effective_addr(-8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
927 move_reg_to_mem(OpndSize_32, PhysicalReg_ECX, true, 4, PhysicalReg_ESP, true);
929 move_reg_to_mem(OpndSize_32, P_GPR_1, true, 0, PhysicalReg_ESP, true);
931 load_effective_addr(8, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1139 load_effective_addr(-24, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1140 move_reg_to_mem(OpndSize_32, 1, false, 16, PhysicalReg_ESP, true);
1143 move_reg_to_mem(OpndSize_32, 2, false, 0, PhysicalReg_ESP, true);
1147 move_reg_to_mem(OpndSize_32, 3, false, 4, PhysicalReg_ESP, true);
1151 move_reg_to_mem(OpndSize_32, 4, false, 8, PhysicalReg_ESP, true);
1155 move_reg_to_mem(OpndSize_32, 5, false, 12, PhysicalReg_ESP, true);
1163 load_effective_addr(24, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1336 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1337 move_imm_to_mem(OpndSize_32, tmp, 4, PhysicalReg_ESP, true);
1338 move_imm_to_mem(OpndSize_32, (int) currentMethod->clazz->pDvmDex, 12, PhysicalReg_ESP, true);
1339 move_imm_to_mem(OpndSize_32, (int) currentMethod, 8, PhysicalReg_ESP, true);
1340 move_reg_to_mem(OpndSize_32, P_GPR_3, true, 0, PhysicalReg_ESP, true);
1343 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1367 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1368 move_reg_to_mem(OpndSize_32, PhysicalReg_EAX, true, 0, PhysicalReg_ESP, true);
1370 move_chain_to_mem(OpndSize_32, traceCurrentBB->taken->id, 8, PhysicalReg_ESP, true); //predictedChainCell
1371 move_reg_to_mem(OpndSize_32, P_GPR_3, true, 12, PhysicalReg_ESP, true);
1374 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1383 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1384 move_imm_to_mem(OpndSize_32, tmp, 4, PhysicalReg_ESP, true);
1385 move_imm_to_mem(OpndSize_32, (int) currentMethod->clazz->pDvmDex, 12, PhysicalReg_ESP, true);
1386 move_imm_to_mem(OpndSize_32, (int) currentMethod, 8, PhysicalReg_ESP, true);
1387 move_reg_to_mem(OpndSize_32, 40, false, 0, PhysicalReg_ESP, true);
1390 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1434 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1435 move_reg_to_mem(OpndSize_32, PhysicalReg_EAX, true, 0, PhysicalReg_ESP, true);
1436 move_reg_to_mem(OpndSize_32, PhysicalReg_SCRATCH_7, isScratchPhysical, 4, PhysicalReg_ESP, true);
1438 move_chain_to_mem(OpndSize_32, traceCurrentBB->taken->id, 8, PhysicalReg_ESP, true); //predictedChainCell
1439 move_reg_to_mem(OpndSize_32, 40, false, 12, PhysicalReg_ESP, true);
1442 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1469 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1470 move_reg_to_mem(OpndSize_32, PhysicalReg_ECX, true, 0, PhysicalReg_ESP, true);
1472 move_chain_to_mem(OpndSize_32, traceCurrentBB->taken->id, 8, PhysicalReg_ESP, true); //predictedChainCell
1473 move_reg_to_mem(OpndSize_32, P_GPR_3, true, 12, PhysicalReg_ESP, true);
1476 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1510 load_effective_addr(-16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1511 move_reg_to_mem(OpndSize_32, PhysicalReg_ECX, true, 0, PhysicalReg_ESP, true);
1512 move_reg_to_mem(OpndSize_32, PhysicalReg_SCRATCH_7, isScratchPhysical, 4, PhysicalReg_ESP, true);
1516 move_chain_to_mem(OpndSize_32, traceTakenId, 8, PhysicalReg_ESP, true); //predictedChainCell
1517 move_reg_to_mem(OpndSize_32, 40, false, 12, PhysicalReg_ESP, true);
1520 load_effective_addr(16, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1553 load_effective_addr(-12, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
1554 move_reg_to_mem(OpndSize_32, P_GPR_1, true, 8, PhysicalReg_ESP, true);
1555 move_reg_to_mem(OpndSize_32, P_SCRATCH_2, true, 4, PhysicalReg_ESP, true);
1556 move_reg_to_mem(OpndSize_32, P_GPR_3, true, 0, PhysicalReg_ESP, true);
1568 move_mem_to_reg(OpndSize_32, 8, PhysicalReg_ESP, true, P_GPR_1, true);
1569 move_mem_to_reg(OpndSize_32, 4, PhysicalReg_ESP, true, P_SCRATCH_2, true);
1570 move_mem_to_reg(OpndSize_32, 0, PhysicalReg_ESP, true, P_GPR_3, true);
1571 load_effective_addr(12, PhysicalReg_ESP, true, PhysicalReg_ESP, true);
