Home | History | Annotate | Download | only in CodeGen

Lines Matching defs:Order

792     // doesn't implicitly ignore high-order bits when doing
1076 Value *Order = EmitScalarExpr(E->getArg(1));
1077 if (isa<llvm::ConstantInt>(Order)) {
1078 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue();
1082 default: // invalid order
1127 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false);
1128 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]);
1162 Value *Order = EmitScalarExpr(E->getArg(1));
1163 if (isa<llvm::ConstantInt>(Order)) {
1164 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue();
1169 default: // invalid order
1193 Order = Builder.CreateIntCast(Order
1194 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, BBs[0]);
1222 Value *Order = EmitScalarExpr(E->getArg(0));
1223 if (isa<llvm::ConstantInt>(Order)) {
1224 int ord = cast<llvm::ConstantInt>(Order)->getZExtValue();
1227 default: // invalid order
1253 Order = Builder.CreateIntCast(Order, Builder.getInt32Ty(), false);
1254 llvm::SwitchInst *SI = Builder.CreateSwitch(Order, ContBB);