Lines Matching defs:In
15 // in the LLVM IR and exposed by the various codegen lowering phases.
54 cl::desc("Include global information in alias analysis"));
82 // also in the contents set. All operations are O(log N).
321 /// Run - runs the dag combiner on all nodes in the work list
1011 // The WorkListOrder holds the SDNodes in order, but it may contain duplicates.
1012 // In order to avoid a linear scan, we use a set (O(log N)) to hold what the
1037 // If we get back the same node we passed in, rather than a new node or
1040 // mechanics for us, we have no work to do in this case.
1070 // Add any uses of the old node to the worklist in case this node is the
1296 // Clean up in case the token factor is removed.
1304 // Only add if it isn't already in the list.
2318 // For each of OP in AND/OR/XOR:
2346 // For each of OP in SHL/SRL/SRA/AND...
2391 // vector types from memory. In many cases this allows additional shuffle
2512 // This can be a pure constant or a vector splat, in which case we treat the
2571 // If the load type was an EXTLOAD, convert to ZEXTLOAD in order to
2781 // in a register.
3170 // We can only do this xform if we know that bits from X that are set in C2
3171 // but not in C1 are already zero. Likewise for Y.
3247 // Canonicalize shl to left side in a shl/srl pair.
3626 // that are shifted out by the inner shift in the first form. This means
3744 // If truncate is free for the target sext(shl) is likely to result in better
3757 // If the shift is not a no-op (in which case this should be just a sign
3907 // Shifting in all undef bits?
4364 // on vectors in one instruction. We only perform this transformation on
4518 // the value being truncated in Op and which of Op's bits are zero in KnownZero.
4520 // ComputeMaskedBits in the caller.
4658 // on vectors in one instruction. We only perform this transformation on
4888 // on vectors in one instruction. We only perform this transformation on
5542 // Folding it resulted in an illegal node, and it's too late to
5621 // To get the sign bit in the right place, we have to shift it right
5850 // In unsafe math mode, we can fold chains of FADD's of the same value
5851 // into multiplications. This transform is not safe in general because
6547 SDValue In = N0.getOperand(0);
6548 if (In.getValueType() == VT) return In;
6549 if (VT.bitsLT(In.getValueType()))
6551 In, N0.getOperand(1));
6552 return DAG.getNode(ISD::FP_EXTEND, N->getDebugLoc(), VT, In);
6704 // branch. However that doesn't happen very often in normal code, because
6856 // branch. However that doesn't happen very often in normal code, because
6878 /// uses N as its base pointer and that N may be folded in the load / store
6922 /// the add / subtract in and all of its other uses are redirected to the
6967 // will work with the patterns in canonical form.
7029 // FIXME: In some cases, we can be smarter about this.
7056 // If Ptr may be folded in addressing mode of other use, then it's
7270 // the updated indexed value in case of indexed loads), change uses of the
7477 // Check to see if IVal is all zeros in the part being masked in by the 'or'
7714 /// is located in a sequence of memory operations connected by a chain.
7723 // Lowest mem operand in the DAG starts at zero.
7727 /// Sorts store nodes in a link according to their offset from a shared
7758 // This holds the base pointer and the offset in bytes from the base pointer.
7770 // Save the LoadSDNodes that we find in the chain.
7775 // Save the StoreSDNodes that we find in the chain.
7821 // Find the next memory operand in the chain. If the next operand in the
7858 // element in the list of stores.
7933 // in the wide store. The chain we use needs to be the chain of the
7939 // The earliest Node in the DAG.
7990 // example, the case in pr14333 looks like
8063 // load memory address. These variables hold the index in the store node
8066 // This variable refers to the size and not index in the array.
8106 // The earliest Node in the DAG.
8112 // in the wide store. The chain we use needs to be the chain of the
8202 // the number of stores. For example, on x86-32 an f64 can be stored in one
8204 // transform should not be done in this case.
8417 // be converted to a BUILD_VECTOR). Fill in the Ops vector with the
8617 // transformation in other cases anyway.
8680 SDValue In = N->getOperand(i);
8682 if (In.getOpcode() == ISD::UNDEF) continue;
8684 bool AnyExt = In.getOpcode() == ISD::ANY_EXTEND;
8685 bool ZeroExt = In.getOpcode() == ISD::ZERO_EXTEND;
8694 EVT InTy = In.getOperand(0).getValueType();
8710 // In
8738 SDValue In;
8740 In = DAG.getUNDEF(SourceType);
8742 In = Cast->getOperand(0);
8747 Ops[Index] = In;
8777 SDValue In = N->getOperand(i);
8778 unsigned Opc = In.getOpcode();
8792 EVT InVT = In.getOperand(0).getValueType();
8819 SDValue In = N->getOperand(i);
8821 if (In.getOpcode() == ISD::UNDEF)
8824 Opnds.push_back(In.getOperand(0));
9019 "IDX in concat is not a multiple of the result vector length.");
9033 assert(N0.getValueType() == VT && "Vector shuffle must be normalized in DAG");
9414 // This triggers in things like "select bool X, 10.0, 123.0" after the FP
9435 // locations are not in the default address space.
9555 // in it. This is a win when the constant is not otherwise available because
9560 // it is legal, we may not need to store the FP constant in a constant pool.
9567 // extra load, they are likely around in registers for other users.
10030 // Entry token is ideal chain operand, but handled in FindBetterChain.
10065 // (stack) in reverse order maintains the original order and increases the
