Lines Matching refs:FalseBB
1497 if (Cases[0].CC == ISD::SETNE && Cases[0].FalseBB == Cases[1].ThisBB)
1637 // TrueBB and FalseBB are always different unless the incoming IR is
1639 if (CB.TrueBB != CB.FalseBB)
1640 addSuccessorWithWeight(SwitchBB, CB.FalseBB, CB.FalseWeight);
1652 std::swap(CB.TrueBB, CB.FalseBB);
1665 DAG.getBasicBlock(CB.FalseBB));
2079 CaseBlock CB(CC, LHS, RHS, MHS, /* truebb */ I->BB, /* falsebb */ FallThrough,
2303 MachineBasicBlock *FalseBB = 0, *TrueBB = 0;
2332 FalseBB = RHSR.first->BB;
2334 FalseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
2335 CurMF->insert(BBI, FalseBB);
2336 WorkList.push_back(CaseRec(FalseBB,CR.LT,C,RHSR));
2345 CaseBlock CB(ISD::SETULT, SV, C, NULL, TrueBB, FalseBB, CR.CaseBB);
