Lines Matching defs:DAG
1 //===-- AArch64ISelLowering.cpp - AArch64 DAG Lowering Implementation -----===//
11 // selection DAG.
823 AArch64TargetLowering::SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG,
825 MachineFunction &MF = DAG.getMachineFunction();
842 SDValue FIN = DAG.getFrameIndex(GPRIdx, getPointerTy());
846 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64);
847 SDValue Store = DAG.getStore(Val.getValue(1), DL, Val, FIN,
851 FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN,
852 DAG.getConstant(8, getPointerTy()));
861 SDValue FIN = DAG.getFrameIndex(FPRIdx, getPointerTy());
866 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f128);
867 SDValue Store = DAG.getStore(Val.getValue(1), DL, Val, FIN,
871 FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN,
872 DAG.getConstant(16, getPointerTy()));
885 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
895 DebugLoc dl, SelectionDAG &DAG,
897 MachineFunction &MF = DAG.getMachineFunction();
904 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
905 getTargetMachine(), ArgLocs, *DAG.getContext());
925 SDValue FrameIdxN = DAG.getFrameIndex(FrameIdx, PtrTy);
934 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT);
941 SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
942 ArgValue = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN,
953 ArgValue = DAG.getNode(ISD::BITCAST,dl, VA.getValVT(), ArgValue);
969 ArgValue = SDValue(DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG, dl,
971 DAG.getTargetConstant(DestSubReg, MVT::i32)),
981 SaveVarArgRegisters(CCInfo, DAG, dl, Chain);
1010 DebugLoc dl, SelectionDAG &DAG) const {
1015 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1016 getTargetMachine(), RVLocs, *DAG.getContext());
1057 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
1060 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
1064 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag);
1066 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
1075 return DAG.getNode(AArch64ISD::Ret, dl, MVT::Other,
1082 SelectionDAG &DAG = CLI.DAG;
1093 MachineFunction &MF = DAG.getMachineFunction();
1103 Outs, OutVals, Ins, DAG);
1112 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
1113 getTargetMachine(), ArgLocs, *DAG.getContext());
1149 Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
1151 SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, AArch64::XSP,
1183 Arg = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, dl,
1185 DAG.getUNDEF(VA.getLocVT()),
1187 DAG.getTargetConstant(SrcSubReg, MVT::i32)),
1193 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
1216 DstAddr = DAG.getFrameIndex(FI, getPointerTy());
1221 Chain = addTokenForArgument(Chain, DAG, MF.getFrameInfo(), FI);
1223 SDValue PtrOff = DAG.getIntPtrConstant(VA.getLocMemOffset());
1225 DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff);
1230 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i64);
1231 SDValue Cpy = DAG.getMemcpy(Chain, dl, DstAddr, Arg, SizeNode,
1239 SDValue Store = DAG.getStore(Chain, dl, Arg, DstAddr, DstInfo,
1249 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1258 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1268 Callee = DAG.getTargetGlobalAddress(GV, dl, getPointerTy());
1271 Callee = DAG.getTargetExternalSymbol(Sym, getPointerTy());
1279 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
1280 DAG.getIntPtrConstant(0, true), InFlag);
1284 // We produce the following DAG scheme for the actual call instruction:
1298 Ops.push_back(DAG.getTargetConstant(FPDiff, MVT::i32));
1302 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1311 Ops.push_back(DAG.getRegisterMask(Mask));
1317 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
1320 return DAG.getNode(AArch64ISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size());
1323 Chain = DAG.getNode(AArch64ISD::Call, dl, NodeTys, &Ops[0], Ops.size());
1332 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
1333 DAG.getIntPtrConstant(CalleePopBytes, true),
1339 IsVarArg, Ins, dl, DAG, InVals);
1346 DebugLoc dl, SelectionDAG &DAG,
1350 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
1351 getTargetMachine(), RVLocs, *DAG.getContext());
1361 SDValue Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
1370 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val);
1377 Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val);
1396 SelectionDAG& DAG) const {
1404 const MachineFunction &MF = DAG.getMachineFunction();
1440 CCState CCInfo(CalleeCC, IsVarArg, DAG.getMachineFunction(),
1441 getTargetMachine(), ArgLocs, *DAG.getContext());
1453 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(),
1454 getTargetMachine(), RVLocs1, *DAG.getContext());
1458 CCState CCInfo2(CallerCC, false, DAG.getMachineFunction(),
1459 getTargetMachine(), RVLocs2, *DAG.getContext());
1484 CCState CCInfo(CalleeCC, IsVarArg, DAG.getMachineFunction(),
1485 getTargetMachine(), ArgLocs, *DAG.getContext());
1507 SelectionDAG &DAG,
1520 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(),
1521 UE = DAG.getEntryNode().getNode()->use_end(); U != UE; ++U)
1535 return DAG.getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
1568 SelectionDAG &DAG, DebugLoc &dl) const {
1594 RHS = DAG.getConstant(C-1, VT);
1601 RHS = DAG.getConstant(C-1, VT);
1608 RHS = DAG.getConstant(C+1, VT);
1615 RHS = DAG.getConstant(C+1, VT);
1623 A64cc = DAG.getConstant(CondCode, MVT::i32);
1624 return DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
1625 DAG.getCondCode(CC));
1660 AArch64TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
1670 return DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
1671 DAG.getTargetBlockAddress(BA, PtrVT, 0,
1673 DAG.getTargetBlockAddress(BA, PtrVT, 0,
1675 DAG.getConstant(/*Alignment=*/ 4, MVT::i32));
1681 AArch64TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
1690 TheBit = DAG.getNode(ISD::AND, dl, MVT::i32, TheBit,
1691 DAG.getConstant(1, MVT::i32));
1693 SDValue A64CMP = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, TheBit,
1694 DAG.getConstant(0, TheBit.getValueType()),
1695 DAG.getCondCode(ISD::SETNE));
1697 return DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other, Chain,
1698 A64CMP, DAG.getConstant(A64CC::NE, MVT::i32),
1704 AArch64TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
1715 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl);
1720 RHS = DAG.getConstant(0, LHS.getValueType());
1730 SDValue CmpOp = getSelectableIntSetCC(LHS, RHS, CC, A64cc, DAG, dl);
1732 return DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other,
1741 SDValue A64cc = DAG.getConstant(CondCode, MVT::i32);
1742 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
1743 DAG.getCondCode(CC));
1744 SDValue A64BR_CC = DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other,
1748 A64cc = DAG.getConstant(Alternative, MVT::i32);
1749 A64BR_CC = DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other,
1758 AArch64TargetLowering::LowerF128ToCall(SDValue Op, SelectionDAG &DAG,
1764 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
1770 SDValue Callee = DAG.getExternalSymbol(getLibcallName(Call), getPointerTy());
1772 Type *RetTy = Op.getValueType().getTypeForEVT(*DAG.getContext());
1778 SDValue InChain = DAG.getEntryNode();
1783 bool isTailCall = isInTailCallPosition(DAG, Op.getNode(), TCChain);
1791 Callee, Args, DAG, Op->getDebugLoc());
1795 // It's a tailcall, return the chain (which is the DAG root).
1796 return DAG.getRoot();
1802 AArch64TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
1812 return makeLibCall(DAG, LC, Op.getValueType(), &SrcVal, 1,
1817 AArch64TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
1823 return LowerF128ToCall(Op, DAG, LC);
1827 AArch64TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
1840 return LowerF128ToCall(Op, DAG, LC);
1845 SelectionDAG &DAG) const {
1863 PoolAddr = DAG.getNode(AArch64ISD::WrapperSmall, dl, PtrVT,
1864 DAG.getTargetConstantPool(GV, PtrVT, 0, 0,
1866 DAG.getTargetConstantPool(GV, PtrVT, 0, 0,
1868 DAG.getConstant(8, MVT::i32));
1869 SDValue GlobalAddr = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), PoolAddr,
1875 return DAG.getNode(ISD::ADD, dl, PtrVT, GlobalAddr,
1876 DAG.getConstant(GN->getOffset(), PtrVT));
1909 SDValue GlobalRef = DAG.getNode(AArch64ISD::WrapperSmall, dl, PtrVT,
1910 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
1912 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
1914 DAG.getConstant(Alignment, MVT::i32));
1917 GlobalRef = DAG.getNode(AArch64ISD::GOTLoad, dl, PtrVT, DAG.getEntryNode(),
1922 return DAG.getNode(ISD::ADD, dl, PtrVT, GlobalRef,
1923 DAG.getConstant(GN->getOffset(), PtrVT));
1931 SelectionDAG &DAG) const {
1937 Func = DAG.getNode(AArch64ISD::GOTLoad, DL, PtrVT, DAG.getEntryNode(),
1943 Chain = DAG.getCopyToReg(DAG.getEntryNode(), DL, AArch64::X0, DescAddr, Glue);
1958 Ops.push_back(DAG.getRegister(AArch64::X0, PtrVT));
1959 Ops.push_back(DAG.getRegisterMask(Mask));
1962 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
1963 Chain = DAG.getNode(AArch64ISD::TLSDESCCALL, DL, NodeTys, &Ops[0],
1969 return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Glue);
1974 SelectionDAG &DAG) const {
1986 SDValue ThreadBase = DAG.getNode(AArch64ISD::THREAD_POINTER, DL, PtrVT);
1989 TPOff = DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
1990 DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
1992 DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
1994 DAG.getConstant(8, MVT::i32));
1995 TPOff = DAG.getNode(AArch64ISD::GOTLoad, DL, PtrVT, DAG.getEntryNode(),
1998 SDValue HiVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2000 SDValue LoVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2003 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVZxii, DL, PtrVT, HiVar,
2004 DAG.getTargetConstant(0, MVT::i32)), 0);
2005 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVKxii, DL, PtrVT,
2007 DAG.getTargetConstant(0, MVT::i32)), 0);
2011 SDValue HiDesc = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
2013 SDValue LoDesc = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
2015 SDValue DescAddr = DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
2017 DAG.getConstant(8, MVT::i32));
2018 SDValue SymAddr = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0);
2020 TPOff = LowerTLSDescCall(SymAddr, DescAddr, DL, DAG);
2028 AArch64MachineFunctionInfo* MFI = DAG.getMachineFunction()
2034 SDValue HiDesc = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT,
2036 SDValue LoDesc = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT,
2038 SDValue DescAddr = DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
2040 DAG.getConstant(8, MVT::i32));
2041 SDValue SymAddr = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT);
2043 ThreadBase = LowerTLSDescCall(SymAddr, DescAddr, DL, DAG);
2046 SDValue HiVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2048 SDValue LoVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2051 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVZxii, DL, PtrVT, HiVar,
2052 DAG.getTargetConstant(0, MVT::i32)), 0);
2053 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVKxii, DL, PtrVT,
2055 DAG.getTargetConstant(0, MVT::i32)), 0);
2060 return DAG.getNode(ISD::ADD, DL, PtrVT, ThreadBase, TPOff);
2064 AArch64TargetLowering::LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG,
2077 return LowerF128ToCall(Op, DAG, LC);
2082 AArch64TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
2088 return DAG.getNode(AArch64ISD::WrapperSmall, dl, getPointerTy(),
2089 DAG.getTargetJumpTable(JT->getIndex(), getPointerTy()),
2090 DAG.getTargetJumpTable(JT->getIndex(), getPointerTy(),
2092 DAG.getConstant(1, MVT::i32));
2097 AArch64TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
2108 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl);
2113 RHS = DAG.getConstant(0, LHS.getValueType());
2123 SDValue CmpOp = getSelectableIntSetCC(LHS, RHS, CC, A64cc, DAG, dl);
2125 return DAG.getNode(AArch64ISD::SELECT_CC, dl, Op.getValueType(),
2134 SDValue A64cc = DAG.getConstant(CondCode, MVT::i32);
2135 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
2136 DAG.getCondCode(CC));
2137 SDValue A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl,
2142 A64cc = DAG.getConstant(Alternative, MVT::i32);
2143 A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl, Op.getValueType(),
2153 AArch64TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
2162 TheBit = DAG.getNode(ISD::AND, dl, MVT::i32, TheBit,
2163 DAG.getConstant(1, MVT::i32));
2164 SDValue A64CMP = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, TheBit,
2165 DAG.getConstant(0, TheBit.getValueType()),
2166 DAG.getCondCode(ISD::SETNE));
2168 return DAG.getNode(AArch64ISD::SELECT_CC, dl, Op.getValueType(),
2170 DAG.getConstant(A64CC::NE, MVT::i32));
2175 AArch64TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
2185 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl);
2200 SDValue CmpOp = getSelectableIntSetCC(LHS, RHS, CC, A64cc, DAG, dl);
2202 return DAG.getNode(AArch64ISD::SELECT_CC, dl, VT,
2203 CmpOp, DAG.getConstant(1, VT), DAG.getConstant(0, VT),
2212 SDValue A64cc = DAG.getConstant(CondCode, MVT::i32);
2213 SDValue CmpOp = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
2214 DAG.getCondCode(CC));
2215 SDValue A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl, VT,
2216 CmpOp, DAG.getConstant(1, VT),
2217 DAG.getConstant(0, VT), A64cc);
2220 A64cc = DAG.getConstant(Alternative, MVT::i32);
2221 A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl, VT, CmpOp,
2222 DAG.getConstant(1, VT), A64SELECT_CC, A64cc);
2229 AArch64TargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
2235 return DAG.getMemcpy(Op.getOperand(0), Op.getDebugLoc(),
2237 DAG.getConstant(32, MVT::i32), 8, false, false,
2242 AArch64TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
2245 MachineFunction &MF = DAG.getMachineFunction();
2256 SDValue Stack = DAG.getFrameIndex(FuncInfo->getVariadicStackIdx(),
2258 MemOps.push_back(DAG.getStore(Chain, DL, Stack, VAList,
2266 GRTopAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2267 DAG.getConstant(8, getPointerTy()));
2269 GRTop = DAG.getFrameIndex(FuncInfo->getVariadicGPRIdx(), getPointerTy());
2270 GRTop = DAG.getNode(ISD::ADD, DL, getPointerTy(), GRTop,
2271 DAG.getConstant(GPRSize, getPointerTy()));
2273 MemOps.push_back(DAG.getStore(Chain, DL, GRTop, GRTopAddr,
2282 VRTopAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2283 DAG.getConstant(16, getPointerTy()));
2285 VRTop = DAG.getFrameIndex(FuncInfo->getVariadicFPRIdx(), getPointerTy());
2286 VRTop = DAG.getNode(ISD::ADD, DL, getPointerTy(), VRTop,
2287 DAG.getConstant(FPRSize, getPointerTy()));
2289 MemOps.push_back(DAG.getStore(Chain, DL, VRTop, VRTopAddr,
2295 SDValue GROffsAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2296 DAG.getConstant(24, getPointerTy()));
2297 MemOps.push_back(DAG.getStore(Chain, DL, DAG.getConstant(-GPRSize, MVT::i32),
2302 SDValue VROffsAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2303 DAG.getConstant(28, getPointerTy()));
2304 MemOps.push_back(DAG.getStore(Chain, DL, DAG.getConstant(-FPRSize, MVT::i32),
2308 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
2313 AArch64TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
2316 case ISD::FADD: return LowerF128ToCall(Op, DAG, RTLIB::ADD_F128);
2317 case ISD::FSUB: return LowerF128ToCall(Op, DAG, RTLIB::SUB_F128);
2318 case ISD::FMUL: return LowerF128ToCall(Op, DAG, RTLIB::MUL_F128);
2319 case ISD::FDIV: return LowerF128ToCall(Op, DAG, RTLIB::DIV_F128);
2320 case ISD::FP_TO_SINT: return LowerFP_TO_INT(Op, DAG, true);
2321 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG, false);
2322 case ISD::SINT_TO_FP: return LowerINT_TO_FP(Op, DAG, true);
2323 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG, false);
2324 case ISD::FP_ROUND: return LowerFP_ROUND(Op, DAG);
2325 case ISD::FP_EXTEND: return LowerFP_EXTEND(Op, DAG);
2327 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
2328 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
2329 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
2330 case ISD::GlobalAddress: return LowerGlobalAddressELF(Op, DAG);
2331 case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
2332 case ISD::JumpTable: return LowerJumpTable(Op, DAG);
2333 case ISD::SELECT: return LowerSELECT(Op, DAG);
2334 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
2335 case ISD::SETCC: return LowerSETCC(Op, DAG);
2336 case ISD::VACOPY: return LowerVACOPY(Op, DAG);
2337 case ISD::VASTART: return LowerVASTART(Op, DAG);
2346 SelectionDAG &DAG = DCI.DAG;
2375 return DAG.getNode(AArch64ISD::UBFX, DL, VT, Shift.getOperand(0),
2376 DAG.getConstant(LSB, MVT::i64),
2377 DAG.getConstant(LSB + Width - 1, MVT::i64));
2386 SelectionDAG &DAG = DCI.DAG;
2411 SDValue Op = DAG.getAtomic(ISD::ATOMIC_LOAD, DL, AtomicNode->getMemoryVT(),
2419 DAG.ReplaceAllUsesWith(AtomicNode, Op.getNode());
2428 SelectionDAG &DAG = DCI.DAG;
2444 return DAG.getAtomic(ISD::ATOMIC_STORE, DL, AtomicNode->getMemoryVT(),
2457 static int32_t getLSBForBFI(SelectionDAG &DAG, DebugLoc DL, EVT VT,
2486 MaskedVal = DAG.getNode(ISD::SRL, DL, VT, MaskedVal,
2487 DAG.getConstant(ShiftRightRequired, MVT::i64));
2491 MaskedVal = DAG.getNode(ISD::SHL, DL, VT, MaskedVal,
2492 DAG.getConstant(-ShiftRightRequired, MVT::i64));
2532 SelectionDAG &DAG = DCI.DAG;
2569 if (getLSBForBFI(DAG, DL, VT, Bitfield, LHSMask) != -1) {
2579 int32_t LSB = getLSBForBFI(DAG, DL, VT, Bitfield, RHSMask);
2586 SDValue BFI = DAG.getNode(AArch64ISD::BFI, DL, VT,
2588 DAG.getConstant(LSB, MVT::i64),
2589 DAG.getConstant(Width, MVT::i64));
2595 return DAG.getNode(ISD::AND, DL, VT, BFI,
2596 DAG.getConstant(LHSMask | RHSMask, VT));
2613 SelectionDAG &DAG = DCI.DAG;
2649 OldBFIVal = DAG.getNode(ISD::ANY_EXTEND, DL, VT, OldBFIVal);
2650 NewBFIVal = DAG.getNode(ISD::ANY_EXTEND, DL, VT, NewBFIVal);
2657 BFI = DAG.getNode(AArch64ISD::BFI, DL, VT,
2665 return DAG.getNode(ISD::AND, DL, VT, BFI,
2666 DAG.getConstant(ExtraMask | ExistingMask, VT));
2695 SelectionDAG &DAG = DCI.DAG;
2729 return DAG.getNode(AArch64ISD::EXTR, DL, VT,
2731 DAG.getConstant(ShiftRHS, MVT::i64));
2734 /// Target-specific dag combine xforms for ISD::OR
2739 SelectionDAG &DAG = DCI.DAG;
2742 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT))
2763 /// Target-specific dag combine xforms for ISD::SRA
2767 SelectionDAG &DAG = DCI.DAG;
2795 return DAG.getNode(AArch64ISD::SBFX, DL, VT, Shift.getOperand(0),
2796 DAG.getConstant(LSB, MVT::i64),
2797 DAG.getConstant(LSB + Width - 1, MVT::i64));
2861 SelectionDAG &DAG) const {
2904 Result = DAG.getTargetConstant(CVal, Op.getValueType());
2910 Result = DAG.getTargetGlobalAddress(GA->getGlobal(), Op.getDebugLoc(),
2914 Result = DAG.getTargetBlockAddress(BA->getBlockAddress(),
2918 Result = DAG.getTargetExternalSymbol(ES->getSymbol(),
2927 Result = DAG.getTargetConstantFP(0.0, CFP->getValueType(0));
2940 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
