Lines Matching full:b0000
918 def VLD4d8 : VLD4D<0b0000, {0,0,?,?}, "8">;
919 def VLD4d16 : VLD4D<0b0000, {0,1,?,?}, "16">;
920 def VLD4d32 : VLD4D<0b0000, {1,0,?,?}, "32">;
937 def VLD4d8_UPD : VLD4DWB<0b0000, {0,0,?,?}, "8">;
938 def VLD4d16_UPD : VLD4DWB<0b0000, {0,1,?,?}, "16">;
939 def VLD4d32_UPD : VLD4DWB<0b0000, {1,0,?,?}, "32">;
1026 def VLD1LNd8 : VLD1LN<0b0000, {?,?,?,0}, "8", v8i8, extloadi8> {
1061 def VLD1LNd8_UPD : VLD1LNWB<0b0000, {?,?,?,0}, "8"> {
1900 def VST4d8 : VST4D<0b0000, {0,0,?,?}, "8">;
1901 def VST4d16 : VST4D<0b0000, {0,1,?,?}, "16">;
1902 def VST4d32 : VST4D<0b0000, {1,0,?,?}, "32">;
1919 def VST4d8_UPD : VST4DWB<0b0000, {0,0,?,?}, "8">;
1920 def VST4d16_UPD : VST4DWB<0b0000, {0,1,?,?}, "16">;
1921 def VST4d32_UPD : VST4DWB<0b0000, {1,0,?,?}, "32">;
1990 def VST1LNd8 : VST1LN<0b0000, {?,?,?,0}, "8", v8i8, truncstorei8,
2033 def VST1LNd8_UPD : VST1LNWB<0b0000, {?,?,?,0}, "8", v8i8, post_truncsti8,
3939 defm VADDLs : N3VLExt_QHS<0,1,0b0000,0, IIC_VSHLiD, IIC_VSHLiD,
3941 defm VADDLu : N3VLExt_QHS<1,1,0b0000,0, IIC_VSHLiD, IIC_VSHLiD,
3947 defm VHADDs : N3VInt_QHS<0, 0, 0b0000, 0, N3RegFrm,
3950 defm VHADDu : N3VInt_QHS<1, 0, 0b0000, 0, N3RegFrm,
3961 defm VQADDs : N3VInt_QHSD<0, 0, 0b0000, 1, N3RegFrm,
3964 defm VQADDu : N3VInt_QHSD<1, 0, 0b0000, 1, N3RegFrm,
4082 defm VMLAsl : N3VMulOpSL_HS<0b0000, IIC_VMACi16D, IIC_VMACi32D,
4778 defm VSHRs : N2VShR_QHSD<0, 1, 0b0000, 1, IIC_VSHLiD, "vshr", "s", "VSHRs",
4780 defm VSHRu : N2VShR_QHSD<1, 1, 0b0000, 1, IIC_VSHLiD, "vshr", "u", "VSHRu",
