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Lines Matching refs:getKillRegState

339       .addReg(Base, getKillRegState(BaseKill)).addImm(Offset)
350     .addReg(Base, getKillRegState(BaseKill))
354                      | getKillRegState(Regs[i].second));
779     .addReg(Base, getKillRegState(BaseKill))
932       .addReg(Base, getKillRegState(isLd ? BaseKill : false))
935                             getKillRegState(MO.isKill())));
966         .addReg(MO.getReg(), getKillRegState(MO.isKill()))
972         .addReg(MO.getReg(), getKillRegState(MO.isKill()))
1085       .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef));
1090       .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef))
1091       .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef));
1140           .addReg(BaseReg, getKillRegState(BaseKill))
1147           .addReg(BaseReg, getKillRegState(BaseKill))
1150                   getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef))
1152                   getKillRegState(OddDeadKill)  | getUndefRegState(OddUndef));