Cross Reference: /external/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Lines Matching defs:RegOp

219   struct RegOp {
235     struct RegOp Reg;
422   const MCOperand &RegOp = Inst.getOperand(0);
423   assert(RegOp.isReg() && "expected register operand kind");
431     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
440     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
450     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
455     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
456     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
510   const MCOperand &RegOp = Inst.getOperand(0);
511   assert(RegOp.isReg() && "expected register operand kind");
517     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
527     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
532     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));
533     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));

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