Lines Matching defs:DAG
1 //===-- SIISelLowering.cpp - SI DAG Lowering Implementation ---------------===//
11 /// \brief Custom DAG lowering for SI
85 DebugLoc DL, SelectionDAG &DAG,
90 MachineFunction &MF = DAG.getMachineFunction();
140 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
141 getTargetMachine(), ArgLocs, *DAG.getContext());
170 InVals.push_back(DAG.getCopyFromReg(Chain, DL, Reg, VT));
177 SDValue Val = DAG.getCopyFromReg(Chain, DL, Reg, VT);
191 Regs.push_back(DAG.getCopyFromReg(Chain, DL, Reg, VT));
197 Regs.push_back(DAG.getUNDEF(VT));
199 InVals.push_back(DAG.getNode(ISD::BUILD_VECTOR, DL, Arg.VT,
242 // Custom DAG Lowering Operations
245 SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
247 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
248 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
249 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
273 SelectionDAG &DAG) const {
310 SDNode *Result = DAG.getNode(
312 DAG.getVTList(Res.data(), Res.size()), Ops.data(), Ops.size()).getNode();
320 DAG.MorphNodeTo(BR, ISD::BR, BR->getVTList(), Ops, 2);
331 Chain = DAG.getCopyToReg(
337 DAG.ReplaceAllUsesWith(SDValue(CopyToReg, 0), CopyToReg->getOperand(0));
341 DAG.ReplaceAllUsesOfValueWith(
348 SDValue SITargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
358 SDValue MinMax = LowerMinMax(Op, DAG);
363 SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC);
364 return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);
368 // Custom DAG optimizations
373 SelectionDAG &DAG = DCI.DAG;
388 return DAG.getNode(ISD::SETCC, DL, VT, N->getOperand(0),
409 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL);
494 bool SITargetLowering::fitsRegClass(SelectionDAG &DAG, SDValue &Op,
497 MachineRegisterInfo &MRI = DAG.getMachineFunction().getRegInfo();
519 void SITargetLowering::ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
532 if (fitsRegClass(DAG, Operand, RegClass))
543 SDValue RC = DAG.getTargetConstant(RegClass, MVT::i32);
544 SDNode *Node = DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS, DebugLoc(),
550 SelectionDAG &DAG) const {
614 fitsRegClass(DAG, Ops[0], RegClass) &&
645 ensureSRegLimit(DAG, Ops[i], RegClass, ScalarSlotUsed);
652 Ops.push_back(DAG.getTargetConstant(0, MVT::i32));
661 return DAG.getMachineNode(OpcodeE64, Node->getDebugLoc(),
664 return DAG.UpdateNodeOperands(Node, Ops.data(), Ops.size());
