Lines Matching refs:addReg
141 .addReg(AMDGPU::EXEC);
158 .addReg(AMDGPU::EXEC);
167 .addReg(AMDGPU::VGPR0)
168 .addReg(AMDGPU::VGPR0)
169 .addReg(AMDGPU::VGPR0)
170 .addReg(AMDGPU::VGPR0);
183 .addReg(Vcc);
186 .addReg(AMDGPU::EXEC)
187 .addReg(Reg);
201 .addReg(Src); // Saved EXEC
204 .addReg(AMDGPU::EXEC)
205 .addReg(Dst);
220 .addReg(AMDGPU::EXEC)
221 .addReg(Src);
235 .addReg(Vcc)
236 .addReg(Src);
250 .addReg(Saved)
251 .addReg(Src);
262 .addReg(AMDGPU::EXEC)
263 .addReg(Src);
267 .addReg(AMDGPU::EXEC);
279 .addReg(AMDGPU::EXEC)
280 .addReg(Reg);
322 .addReg(Idx);
333 .addReg(AMDGPU::EXEC);
337 .addReg(Idx);
341 .addReg(AMDGPU::VCC);
345 .addReg(AMDGPU::M0)
346 .addReg(Idx);
350 .addReg(AMDGPU::VCC);
357 .addReg(AMDGPU::EXEC)
358 .addReg(AMDGPU::VCC);
363 .addReg(AMDGPU::EXEC);
367 .addReg(Save);
383 .addReg(TRI->getSubReg(Vec, AMDGPU::sub0) + Off)
384 .addReg(AMDGPU::M0, RegState::Implicit)
385 .addReg(Vec, RegState::Implicit);
401 .addReg(TRI->getSubReg(Dst, AMDGPU::sub0) + Off, RegState::Define)
402 .addReg(Val)
403 .addReg(AMDGPU::M0, RegState::Implicit)
404 .addReg(Dst, RegState::Implicit);
