Lines Matching refs:IDX
63 /// simple subregister reference. Idx is an index in the 128 bits we
102 /// simple superregister reference. Idx is an index in the 128 bits
3449 int Idx = Mask[i+l];
3452 if (!isUndefOrInRange(Idx, l, l+NumLaneElts) &&
3453 !isUndefOrInRange(Idx, l+NumElts, l+NumElts+NumLaneElts))
3457 if (l != 0 && Mask[i] >= 0 && !isUndefOrEqual(Idx, Mask[i]+l))
3460 if (Idx >= (int)NumElts)
3461 Idx -= NumElts - NumLaneElts;
3463 if (!isUndefOrEqual(Idx, Start+i))
3477 int idx = Mask[i];
3478 if (idx < 0)
3480 else if (idx < (int)NumElems)
3481 Mask[i] = idx + NumElems;
3483 Mask[i] = idx - NumElems;
3525 int Idx = Mask[i+l];
3527 if (!isUndefOrInRange(Idx, RngStart, RngStart+NumLaneElems))
3534 if (!isUndefOrEqual(Idx, Mask[i]+l))
4255 int Idx = SVOp->getMaskElt(i);
4256 if (Idx >= 0) {
4257 if (Idx < (int)NumElems)
4258 Idx += NumElems;
4260 Idx -= NumElems;
4262 MaskVec.push_back(Idx);
4374 int Idx = N->getMaskElt(i);
4375 if (Idx >= (int)NumElems) {
4380 !X86::isZeroNode(V2.getOperand(Idx-NumElems)))
4382 } else if (Idx >= 0) {
4387 !X86::isZeroNode(V1.getOperand(Idx)))
4590 /// Idx. This produces a shuffle mask like 4,1,2,3 (idx=0) or 0,1,2,4 (idx=3).
4591 static SDValue getShuffleVectorZeroOrUndef(SDValue V2, unsigned Idx,
4601 // If this is the insertion idx, put the low elt of V2 here.
4602 MaskVec.push_back(i == Idx ? NumElems : i);
4780 int Idx = SVOp->getMaskElt(i);
4782 if (Idx < 0)
4785 if (Idx < (int)NumElems)
4791 if ((Idx % NumElems != OpIdx) || (SeenV1 && SeenV2))
5318 unsigned Idx = cast<ConstantSDNode>(ExtIdx)->getZExtValue();
5321 Mask[i] = Idx;
5323 Mask[i] = Idx + NumElems;
5332 unsigned Idx = InsertIndices[i];
5333 NV = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, NV, Op.getOperand(Idx),
5334 DAG.getIntPtrConstant(Idx));
5401 unsigned Idx = CountTrailingZeros_32(NonZeros);
5402 SDValue Item = Op.getOperand(Idx);
5410 (!IsAllConstants || Idx == 0)) {
5424 Idx != 0, swizzle it into place.
5425 if (Idx != 0) {
5427 Mask.push_back(Idx);
5441 if (Idx == 0) {
5473 if (NumElems == 2 && Idx == 1 &&
5498 MaskVec.push_back(i == Idx ? 0 : 1);
5510 unsigned Idx = CountTrailingZeros_32(NonZeros);
5511 SDValue Item = Op.getOperand(Idx);
5545 unsigned Idx = CountTrailingZeros_32(NonZeros);
5547 Op.getOperand(Idx));
5548 return getShuffleVectorZeroOrUndef(V2, Idx, true, Subtarget, DAG);
5840 int idx = MaskVals[i];
5841 if (idx != (int)i)
5843 if (idx < 0 || (idx/4) == BestLoQuad || (idx/4) == BestHiQuad)
5852 int idx = MaskVals[i];
5853 if (idx < 0)
5855 idx = MaskVals[i] = (idx / 4) == BestLoQuad ? (idx & 3) : (idx & 3) + 4;
5856 if ((idx != i) && idx < 4)
5858 if ((idx != i) && idx > 3)
5936 int idx = MaskVals[i];
5937 if (idx < 0) {
5939 } else if ((idx / 4) == BestLoQuad) {
5940 MaskV[i] = idx & 3;
5960 int idx = MaskVals[i];
5961 if (idx < 0) {
5963 } else if ((idx / 4) == BestHiQuad) {
5964 MaskV[i] = (idx & 3) + 4;
6291 int Idx = SVOp->getMaskElt(i+LaneStart);
6292 if (Idx < 0) {
6299 int Input = Idx / NumLaneElems;
6302 Idx -= Input * NumLaneElems;
6325 Mask.push_back(Idx + OpNo * NumLaneElems);
6332 int Idx = SVOp->getMaskElt(i+LaneStart);
6333 if (Idx < 0) {
6339 int Input = Idx / NumElems;
6342 Idx -= Input * NumElems;
6347 DAG.getIntPtrConstant(Idx)));
6393 int Idx = PermMask[i];
6394 if (Idx < 0) {
6397 assert(Idx < 8 && "Invalid VECTOR_SHUFFLE index!");
6398 if (Idx < 4) {
6400 Mask1[NumLo] = Idx;
6405 Mask1[2+NumHi] = Idx;
6422 unsigned Idx = (i < 2) ? 0 : 4;
6423 Idx += Locs[i].first * 2 + Locs[i].second;
6424 Mask2[i] = Idx;
6494 int Idx = PermMask[i];
6495 if (Idx < 0) {
6497 } else if (Idx < 4) {
6499 MaskPtr[LoIdx] = Idx;
6503 MaskPtr[HiIdx] = Idx;
7111 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7112 // If Idx is 0, it's cheaper to do a move instead of a pextrw.
7113 if (Idx == 0)
7171 SDValue Idx = Op.getOperand(1);
7172 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
7196 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7197 if (Idx == 0)
7213 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7214 if (Idx == 0)
7218 int Mask[4] = { static_cast<int>(Idx), -1, -1, -1 };
7230 unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
7231 if (Idx == 0)
7386 SDValue Idx = Op.getNode()->getOperand(1);
7390 isa<ConstantSDNode>(Idx)) {
7391 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
7407 SDValue Idx = Op.getNode()->getOperand(2);
7411 isa<ConstantSDNode>(Idx)) {
7412 unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
7874 SDValue IDX = DAG.getExternalSymbol("_tls_index", getPointerTy());
7876 IDX = DAG.getExtLoad(ISD::ZEXTLOAD, dl, getPointerTy(), Chain,
7877 IDX, MachinePointerInfo(), MVT::i32,
7880 IDX = DAG.getLoad(getPointerTy(), dl, Chain, IDX, MachinePointerInfo(),
7885 IDX = DAG.getNode(ISD::SHL, dl, getPointerTy(), IDX, Scale);
7887 SDValue res = DAG.getNode(ISD::ADD, dl, getPointerTy(), ThreadPointer, IDX);
8815 SDValue Idx = I->getOperand(1);
8816 if (!isa<ConstantSDNode>(Idx))
8832 M->second |= 1U << cast<ConstantSDNode>(Idx)->getZExtValue();
11126 unsigned Idx = 1;
11129 E = FTy->param_end(); I != E; ++I, ++Idx)
11130 if (Attrs.hasAttribute(Idx, Attribute::InReg))
14958 int Idx = (Elt > (int)NumElems) ? -1 : ShuffleMask[Elt];
14959 SDValue LdNode = (Idx < (int)NumElems) ? InVec.getOperand(0)
15081 SDValue Idx = Extract->getOperand(1);
15084 uint64_t Offset = EltSize * cast<ConstantSDNode>(Idx)->getZExtValue();
