Home | History | Annotate | Download | only in X86

Lines Matching refs:addReg

93   return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0).addReg(0);
99 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0);
109 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
117 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
118 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0);
127 MIB.addReg(AM.Base.Reg);
133 MIB.addImm(AM.Scale).addReg(AM.IndexReg);
139 return MIB.addReg(0);
177 return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0)
178 .addConstantPoolIndex(CPI, 0, OpFlags).addReg(0);