Lines Matching refs:getDef
36 if (Init->getDef()->getName() != "outs")
45 if (Init->getDef()->getName() != "ins")
67 Record *Rec = Arg->getDef();
84 cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops")
422 if (ADI && ADI->getDef
428 ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef());
434 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) {
438 .hasSubClass(&T.getRegisterClass(ADI->getDef())))
440 ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef());
445 if (ADI && ADI->getDef()->isSubClassOf("Register")) {
450 InstOpRec = cast<DefInit>(DI->getArg(0))->getDef();
460 .contains(T.getRegBank().getReg(ADI->getDef())))
461 PrintFatalError(Loc, "fixed register " + ADI->getDef()->getName() +
469 ResOp = ResultOperand(ADI->getDef());
474 if (ADI && ADI->getDef()->getName() == "zero_reg") {
505 ADI->getDef()->isSubClassOf("Operand")) {
508 if (InstOpRec->getValueInit("Type") != ADI->getDef()->getValueInit("Type"))
510 ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef());
523 if (DI == 0 || !DI->getDef()->isSubClassOf("Instruction"))
527 ResultInst = &T.getInstruction(DI->getDef());
540 if (Entry && Entry != ADI->getDef())
543 ADI->getDef()->getName() + "!");
544 Entry = ADI->getDef();
580 Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
601 Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
