Home | History | Annotate | Download | only in TableGen

Lines Matching refs:RegUnit

198      << "getRegUnitWeight(unsigned RegUnit) const {\n"
199 << " assert(RegUnit < " << RegBank.getNumNativeRegUnits()
205 const RegUnit &RU = RegBank.getRegUnit(UnitIdx);
206 assert(RU.Weight < 256 && "RegUnit too heavy");
210 << " return RUWeightTable[RegUnit];\n";
295 << "getRegUnitPressureSets(unsigned RegUnit) const {\n"
296 << " assert(RegUnit < " << RegBank.getNumNativeRegUnits()
304 << " unsigned SetListStart = RUSetStartTable[RegUnit];\n"
554 // Differentially encoded register and regunit lists allow for better
825 // Emit the table of register unit roots. Each regunit has one or two root
972 << " virtual unsigned getRegUnitWeight(unsigned RegUnit) const;\n"
978 << " virtual const int *getRegUnitPressureSets(unsigned RegUnit) const;\n"