Lines Matching refs:env
513 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
516 GET_REGL(env->regs[gpr_map[n]]);
520 memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
528 stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
529 stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
532 GET_REG32(env->mxcsr);
537 case 0: GET_REGL(env->eip);
538 case 1: GET_REG32(env->eflags);
539 case 2: GET_REG32(env->segs[R_CS].selector);
540 case 3: GET_REG32(env->segs[R_SS].selector);
541 case 4: GET_REG32(env->segs[R_DS].selector);
542 case 5: GET_REG32(env->segs[R_ES].selector);
543 case 6: GET_REG32(env->segs[R_FS].selector);
544 case 7: GET_REG32(env->segs[R_GS].selector);
546 case 16: GET_REG32(env->fpuc);
547 case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
560 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
565 env->regs[gpr_map[i]] = ldtul_p(mem_buf);
570 memcpy(&env->fpregs[i], mem_buf, 10);
576 env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
577 env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
580 env->mxcsr = ldl_p(mem_buf);
586 case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
587 case 1: env->eflags = ldl_p(mem_buf); return 4;
591 if (tmp != env->segs[sreg].selector)\
592 cpu_x86_load_seg(env, sreg, tmp);
605 case 16: env->fpuc = ldl_p(mem_buf); return 4;
608 env->fpstt = (tmp >> 11) & 7;
609 env->fpus = tmp & ~0x3800;
638 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
642 GET_REGL(env->gpr[n]);
647 stfq_p(mem_buf, env->fpr[n-32]);
651 case 64: GET_REGL(env->nip);
652 case 65: GET_REGL(env->msr);
658 cr |= env->crf[i] << (32 - ((i + 1) * 4));
661 case 67: GET_REGL(env->lr);
662 case 68: GET_REGL(env->ctr);
663 case 69: GET_REGL(env->xer);
675 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
679 env->gpr[n] = ldtul_p(mem_buf);
685 env->fpr[n-32] = ldfq_p(mem_buf);
690 env->nip = ldtul_p(mem_buf);
693 ppc_store_msr(env, ldtul_p(mem_buf));
700 env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
704 env->lr = ldtul_p(mem_buf);
707 env->ctr = ldtul_p(mem_buf);
710 env->xer = ldtul_p(mem_buf);
736 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
740 GET_REGA(env->gregs[n]);
744 GET_REGA(env->regwptr[n - 8]);
749 GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
753 case 64: GET_REGA(env->y);
754 case 65: GET_REGA(GET_PSR(env));
755 case 66: GET_REGA(env->wim);
756 case 67: GET_REGA(env->tbr);
757 case 68: GET_REGA(env->pc);
758 case 69: GET_REGA(env->npc);
759 case 70: GET_REGA(env->fsr);
766 GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
772 val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
773 val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
777 case 80: GET_REGL(env->pc);
778 case 81: GET_REGL(env->npc);
779 case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
780 ((env->asi & 0xff) << 24) |
781 ((env->pstate & 0xfff) << 8) |
782 GET_CWP64(env));
783 case 83: GET_REGL(env->fsr);
784 case 84: GET_REGL(env->fprs);
785 case 85: GET_REGL(env->y);
791 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
805 env->gregs[n] = tmp;
808 env->regwptr[n - 8] = tmp;
813 *((uint32_t *)&env->fpr[n - 32]) = tmp;
817 case 64: env->y = tmp; break;
818 case 65: PUT_PSR(env, tmp); break;
819 case 66: env->wim = tmp; break;
820 case 67: env->tbr = tmp; break;
821 case 68: env->pc = tmp; break;
822 case 69: env->npc = tmp; break;
823 case 70: env->fsr = tmp; break;
831 env->fpr[n] = ldfl_p(mem_buf);
835 *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
836 *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
839 case 80: env->pc = tmp; break;
840 case 81: env->npc = tmp; break;
842 PUT_CCR(env, tmp >> 32);
843 env->asi = (tmp >> 24) & 0xff;
844 env->pstate = (tmp >> 8) & 0xfff;
845 PUT_CWP64(env, tmp & 0xff);
847 case 83: env->fsr = tmp; break;
848 case 84: env->fprs = tmp; break;
849 case 85: env->y = tmp; break;
866 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
870 GET_REG32(env->regs[n]);
887 GET_REG32(cpsr_read(env));
893 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
906 env->regs[n] = tmp;
923 cpsr_write (env, tmp, 0xffffffff);
936 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
940 GET_REG32(env->dregs[n]);
943 GET_REG32(env->aregs[n - 8]);
946 case 16: GET_REG32(env->sr);
947 case 17: GET_REG32(env->pc);
955 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
963 env->dregs[n] = tmp;
966 env->aregs[n - 8] = tmp;
969 case 16: env->sr = tmp; break;
970 case 17: env->pc = tmp; break;
980 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
983 GET_REGL(env->active_tc.gpr[n]);
985 if (env->CP0_Config1 & (1 << CP0C1_FP)) {
987 if (env->CP0_Status & (1 << CP0St_FR))
988 GET_REGL(env->active_fpu.fpr[n - 38].d);
990 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
993 case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
994 case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
998 case 32: GET_REGL((int32_t)env->CP0_Status);
999 case 33: GET_REGL(env->active_tc.LO[0]);
1000 case 34: GET_REGL(env->active_tc.HI[0]);
1001 case 35: GET_REGL(env->CP0_BadVAddr);
1002 case 36: GET_REGL((int32_t)env->CP0_Cause);
1003 case 37: GET_REGL(env->active_tc.PC);
1005 case 89: GET_REGL((int32_t)env->CP0_PRid);
1024 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1026 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1033 env->active_tc.gpr[n] = tmp;
1036 if (env->CP0_Config1 & (1 << CP0C1_FP)
1039 if (env->CP0_Status & (1 << CP0St_FR))
1040 env->active_fpu.fpr[n - 38].d = tmp;
1042 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1046 env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1051 SET_FP_ENABLE(env->active_fpu.fcr31, 0);
1054 case 71: env->active_fpu.fcr0 = tmp; break;
1059 case 32: env->CP0_Status = tmp; break;
1060 case 33: env->active_tc.LO[0] = tmp; break;
1061 case 34: env->active_tc.HI[0] = tmp; break;
1062 case 35: env->CP0_BadVAddr = tmp; break;
1063 case 36: env->CP0_Cause = tmp; break;
1064 case 37: env->active_tc.PC = tmp; break;
1082 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1085 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1086 GET_REGL(env->gregs[n + 16]);
1088 GET_REGL(env->gregs[n]);
1091 GET_REGL(env->gregs[n - 8]);
1093 GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1095 GET_REGL(env->gregs[n - 43]);
1097 GET_REGL(env->gregs[n - (51 - 16)]);
1100 case 16: GET_REGL(env->pc);
1101 case 17: GET_REGL(env->pr);
1102 case 18: GET_REGL(env->gbr);
1103 case 19: GET_REGL(env->vbr);
1104 case 20: GET_REGL(env->mach);
1105 case 21: GET_REGL(env->macl);
1106 case 22: GET_REGL(env->sr);
1107 case 23: GET_REGL(env->fpul);
1108 case 24: GET_REGL(env->fpscr);
1109 case 41: GET_REGL(env->ssr);
1110 case 42: GET_REGL(env->spc);
1116 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1123 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1124 env->gregs[n + 16] = tmp;
1126 env->gregs[n] = tmp;
1130 env->gregs[n - 8] = tmp;
1133 env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1135 env->gregs[n - 43] = tmp;
1138 env->gregs[n - (51 - 16)] = tmp;
1142 case 16: env->pc = tmp;
1143 case 17: env->pr = tmp;
1144 case 18: env->gbr = tmp;
1145 case 19: env->vbr = tmp;
1146 case 20: env->mach = tmp;
1147 case 21: env->macl = tmp;
1148 case 22: env->sr = tmp;
1149 case 23: env->fpul = tmp;
1150 case 24: env->fpscr = tmp;
1151 case 41: env->ssr = tmp;
1152 case 42: env->spc = tmp;
1162 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1165 GET_REG32(env->regs[n]);
1167 GET_REG32(env->sregs[n - 32]);
1172 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1182 env->regs[n] = tmp;
1184 env->sregs[n - 32] = tmp;
1192 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1196 srs = env->pregs[PR_SRS];
1198 GET_REG32(env->regs[n]);
1202 GET_REG32(env->pregs[n - 16]);
1205 GET_REG32(env->sregs[srs][n - 33]);
1208 case 16: GET_REG8(env->pregs[0]);
1209 case 17: GET_REG8(env->pregs[1]);
1210 case 18: GET_REG32(env->pregs[2]);
1212 case 20: GET_REG16(env->pregs[4]);
1213 case 32: GET_REG32(env->pc);
1219 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1229 env->regs[n] = tmp;
1233 env->pregs[n - 16] = tmp;
1240 case 18: env->pregs[PR_PID] = tmp; break;
1243 case 32: env->pc = tmp; break;
1252 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1255 GET_REGL(env->ir[n]);
1263 val=*((uint64_t *)&env->fir[n-32]);
1267 GET_REGL(env->fpcr);
1270 GET_REGL(env->pc);
1279 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1285 env->ir[n] = tmp;
1289 env->fir[n - 32] = ldfl_p(mem_buf);
1293 env->pc=tmp;
1302 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1307 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1382 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1387 return cpu_gdb_read_register(env, mem_buf, reg);
1389 for (r = env->gdb_regs; r; r = r->next) {
1391 return r->get_reg(env, mem_buf, reg - r->base_reg);
1397 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1402 return cpu_gdb_write_register(env, mem_buf, reg);
1404 for (r = env->gdb_regs; r; r = r->next) {
1406 return r->set_reg(env, mem_buf, reg - r->base_reg);
1418 void gdb_register_coprocessor(CPUState * env,
1432 p = &env->gdb_regs;
1462 CPUState *env;
1471 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1472 err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1481 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1482 err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1496 CPUState *env;
1505 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1506 err = cpu_breakpoint_remove(env, addr, BP_GDB);
1515 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1516 err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1529 CPUState *env;
1536 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1537 cpu_breakpoint_remove_all(env, BP_GDB);
1539 cpu_watchpoint_remove_all(env, BP_GDB);
1569 static inline int gdb_id(CPUState *env)
1572 return env->host_tid;
1574 return env->cpu_index + 1;
1580 CPUState *env;
1582 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1583 if (gdb_id(env) == thread_id) {
1584 return env;
1593 CPUState *env;
1775 env = find_cpu(thread);
1776 if (env == NULL) {
1782 s->c_cpu = env;
1786 s->g_cpu = env;
1796 env = find_cpu(thread);
1798 if (env != NULL) {
1848 env = find_cpu(thread);
1849 if (env != NULL) {
1850 cpu_synchronize_state(env, 0);
1852 "CPU#%d [%s]", env->cpu_index,
1853 env->halted ? "halted " : "running");
1949 void gdb_set_stop_cpu(CPUState *env)
1951 gdbserver_state->c_cpu = env;
1952 gdbserver_state->g_cpu = env;
1959 CPUState *env = s->c_cpu;
1969 cpu_single_step(env, 0);
1972 if (env->watchpoint_hit) {
1973 switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
1986 GDB_SIGNAL_TRAP, gdb_id(env), type,
1987 env->watchpoint_hit->vaddr);
1989 env->watchpoint_hit = NULL;
1992 tb_flush(env);
1997 snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, gdb_id(env));
2158 gdb_handlesig (CPUState *env, int sig)
2169 cpu_single_step(env, 0);
2170 tb_flush(env);
2207 void gdb_exit(CPUState *env, int code)
2221 void gdb_signalled(CPUState *env, int sig)
2309 void gdbserver_fork(CPUState *env)
2316 cpu_breakpoint_remove_all(env, BP_GDB);
2317 cpu_watchpoint_remove_all(env, BP_GDB);
