Lines Matching refs:xff
46 #define ZBIT8(x) (((x) & 0xff) == 0)
84 #define SADB(SHR) abs((int) ((a >> SHR) & 0xff) - (int) ((b >> SHR) & 0xff))
153 SIMD8_SET(NBIT8((x) & 0xff), SIMD_NBIT, i) | \
154 SIMD8_SET(ZBIT8((x) & 0xff), SIMD_ZBIT, i)
168 (((a >> SH0) & 0xff) << 0) | (((b >> SH0) & 0xff) << 8) | \
169 (((a >> SH1) & 0xff) << 16) | (((b >> SH1) & 0xff) << 24) | \
170 (((a >> SH2) & 0xff) << 32) | (((b >> SH2) & 0xff) << 40) | \
171 (((a >> SH3) & 0xff) << 48) | (((b >> SH3) & 0xff) << 56); \
203 (((x >> SH0) & 0xff) << 0) | \
204 (((x >> SH1) & 0xff) << 16) | \
205 (((x >> SH2) & 0xff) << 32) | \
206 (((x >> SH3) & 0xff) << 48); \
230 ((uint64_t) EXTEND8H((x >> SH0) & 0xff) << 0) | \
231 ((uint64_t) EXTEND8H((x >> SH1) & 0xff) << 16) | \
232 ((uint64_t) EXTEND8H((x >> SH2) & 0xff) << 32) | \
233 ((uint64_t) EXTEND8H((x >> SH3) & 0xff) << 48); \
261 CMP(0, Tb, O, 0xff) | CMP(8, Tb, O, 0xff) | \
262 CMP(16, Tb, O, 0xff) | CMP(24, Tb, O, 0xff) | \
263 CMP(32, Tb, O, 0xff) | CMP(40, Tb, O, 0xff) | \
264 CMP(48, Tb, O, 0xff) | CMP(56, Tb, O, 0xff); \
318 ((a >> SHR) & 0xff) + ((b >> SHR) & 0xff) + round) >> 1) << SHR)
326 SIMD8_SET(ZBIT8((a >> 0) & 0xff), SIMD_ZBIT, 0) | \
327 SIMD8_SET(ZBIT8((a >> 8) & 0xff), SIMD_ZBIT, 1) | \
328 SIMD8_SET(ZBIT8((a >> 16) & 0xff), SIMD_ZBIT, 2) | \
329 SIMD8_SET(ZBIT8((a >> 24) & 0xff), SIMD_ZBIT, 3) | \
330 SIMD8_SET(ZBIT8((a >> 32) & 0xff), SIMD_ZBIT, 4) | \
331 SIMD8_SET(ZBIT8((a >> 40) & 0xff), SIMD_ZBIT, 5) | \
332 SIMD8_SET(ZBIT8((a >> 48) & 0xff), SIMD_ZBIT, 6) | \
333 SIMD8_SET(ZBIT8((a >> 56) & 0xff), SIMD_ZBIT, 7); \
391 arg &= 0xff;
415 ((x >> 0) & 0xff) + ((x >> 8) & 0xff) +
416 ((x >> 16) & 0xff) + ((x >> 24) & 0xff) +
417 ((x >> 32) & 0xff) + ((x >> 40) & 0xff) +
418 ((x >> 48) & 0xff) + ((x >> 56) & 0xff);
588 a = (((a >> 0) & 0xff) << 0) | (((a >> 16) & 0xff) << 8) |
589 (((a >> 32) & 0xff) << 16) | (((a >> 48) & 0xff) << 24) |
590 (((b >> 0) & 0xff) << 32) | (((b >> 16) & 0xff) << 40) |
591 (((b >> 32) & 0xff) << 48) | (((b >> 48) & 0xff) << 56);
621 a = (((a >> 0) & 0xff) << 0) | (((a >> 16) & 0xff) << 8) |
622 (((a >> 32) & 0xff) << 16) | (((a >> 48) & 0xff) << 24) |
623 (((b >> 0) & 0xff) << 32) | (((b >> 16) & 0xff) << 40) |
624 (((b >> 32) & 0xff) << 48) | (((b >> 48) & 0xff) << 56);